lib/msun/ld128/s_erfl.c

212

r = pp0+z*(pp1+z*(pp2+z*(pp3+z*(pp4+z*(pp5+z*(pp6+z*(pp7+

lib/msun/ld128/s_erfl.c

270

r = pp0+z*(pp1+z*(pp2+z*(pp3+z*(pp4+z*(pp5+z*(pp6+z*(pp7+

lib/msun/ld128/s_erfl.c

45

pp3 = -1.13202828509005281355609495523452713e-02L, /* 0xbff872f1, 0x6a5023a1, 0xe08b3884, 0x326af20f */

lib/msun/ld80/s_erfl.c

240

r = pp0+z*(pp1+z*(pp2+z*(pp3+z*(pp4+z*pp5))));

lib/msun/ld80/s_erfl.c

290

r = pp0+z*(pp1+z*(pp2+z*(pp3+z*(pp4+z*pp5))));

lib/msun/src/s_erf.c

132

pp3 = -5.77027029648944159157e-03, /* 0xBF77A291, 0x236668E4 */

lib/msun/src/s_erf.c

211

r = pp0+z*(pp1+z*(pp2+z*(pp3+z*pp4)));

lib/msun/src/s_erf.c

261

r = pp0+z*(pp1+z*(pp2+z*(pp3+z*pp4)));

sys/dev/axgbe/if_axgbe_pci.c

511

pdata->pp3 = XP_IOREAD(pdata, XP_PROP_3);

sys/dev/axgbe/if_axgbe_pci.c

516

DBGPR("port property 3 = %#010x\n", pdata->pp3);

sys/dev/axgbe/xgbe-phy-v2.c

3186

XP_GET_BITS(pdata->pp3, XP_PROP_3, GPIO_ADDR);

sys/dev/axgbe/xgbe-phy-v2.c

3187

phy_data->sfp_gpio_mask = XP_GET_BITS(pdata->pp3, XP_PROP_3,

sys/dev/axgbe/xgbe-phy-v2.c

3189

phy_data->sfp_gpio_rx_los = XP_GET_BITS(pdata->pp3, XP_PROP_3,

sys/dev/axgbe/xgbe-phy-v2.c

3191

phy_data->sfp_gpio_tx_fault = XP_GET_BITS(pdata->pp3, XP_PROP_3,

sys/dev/axgbe/xgbe-phy-v2.c

3193

phy_data->sfp_gpio_mod_absent = XP_GET_BITS(pdata->pp3, XP_PROP_3,

sys/dev/axgbe/xgbe-phy-v2.c

3195

phy_data->sfp_gpio_rate_select = XP_GET_BITS(pdata->pp3, XP_PROP_3,

sys/dev/axgbe/xgbe-phy-v2.c

3351

phy_data->mdio_reset = XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET);

sys/dev/axgbe/xgbe-phy-v2.c

3365

XP_GET_BITS(pdata->pp3, XP_PROP_3, MDIO_RESET_I2C_ADDR);

sys/dev/axgbe/xgbe-phy-v2.c

3366

phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3,

sys/dev/axgbe/xgbe-phy-v2.c

3369

phy_data->mdio_reset_gpio = XP_GET_BITS(pdata->pp3, XP_PROP_3,

sys/dev/axgbe/xgbe.h

1034

unsigned int pp3;