sys/arm64/arm64/efirt_machdep.c

141

l3 += pmap_l3_index(va);

sys/arm64/arm64/pmap.c

10377

for (l = pmap_l3_index(sva); l < Ln_ENTRIES;

sys/arm64/arm64/pmap.c

1238

l3_slot = pmap_l3_index(state->va);

sys/arm64/arm64/pmap.c

1448

pmap_store(&bs_state.l3[pmap_l3_index(bs_state.va)],

sys/arm64/arm64/pmap.c

1456

cmap1_pte = &bs_state.l3[pmap_l3_index((vm_offset_t)cmap1_addr)];

sys/arm64/arm64/pmap.c

5404

l3p = &l3p[pmap_l3_index(va)];

sys/arm64/arm64/pmap.c

5600

l3 = &l3[pmap_l3_index(va)];

sys/arm64/arm64/pmap.c

6225

l3p = &l3p[pmap_l3_index(va)];

sys/arm64/arm64/pmap.c

6459

l3 = &l3[pmap_l3_index(va)];

sys/arm64/arm64/pmap.c

652

return (&l3p[pmap_l3_index(va)]);

sys/arm64/arm64/pmap.c

6860

src_pte = &src_pte[pmap_l3_index(addr)];

sys/arm64/arm64/pmap.c

6879

dst_pte = &dst_pte[pmap_l3_index(addr)];

sys/arm64/vmm/vmm_mmu.c

323

KASSERT(atomic_load_64(&l3[pmap_l3_index(va)]) == 0,

sys/arm64/vmm/vmm_mmu.c

326

atomic_store_64(&l3[pmap_l3_index(va)], l3e | pa);

sys/arm64/vmm/vmm_mmu.c

377

l3e = atomic_load_64(&l3[pmap_l3_index(va)]);

sys/arm64/vmm/vmm_mmu.c

385

atomic_store_64(&l3[pmap_l3_index(va)], l3e);

sys/arm64/vmm/vmm_mmu.c

387

l3_list[i] = &l3[pmap_l3_index(va)];

sys/arm64/vmm/vmm_mmu.c

394

atomic_store_64(&l3[pmap_l3_index(va)], 0);

sys/riscv/iommu/iommu_pmap.c

163

return (&l3[pmap_l3_index(va)]);

sys/riscv/riscv/pmap.c

3860

l3 = &l3[pmap_l3_index(va)];

sys/riscv/riscv/pmap.c

488

return (&l3[pmap_l3_index(va)]);

sys/riscv/riscv/pmap.c

5606

for (k = pmap_l3_index(sva); k < Ln_ENTRIES; k++,

sys/riscv/riscv/pmap.c

663

l3slot = pmap_l3_index(va);

sys/riscv/riscv/pmap.c

747

l3slot = pmap_l3_index(va);