sys/arm/arm/pl310.c

101

platform_pl310_init(struct pl310_softc *sc)

sys/arm/arm/pl310.c

108

platform_pl310_write_ctrl(struct pl310_softc *sc, uint32_t val)

sys/arm/arm/pl310.c

115

platform_pl310_write_debug(struct pl310_softc *sc, uint32_t val)

sys/arm/arm/pl310.c

123

pl310_print_config(struct pl310_softc *sc)

sys/arm/arm/pl310.c

164

pl310_set_ram_latency(struct pl310_softc *sc, uint32_t which_reg,

sys/arm/arm/pl310.c

195

struct pl310_softc *sc = arg;

sys/arm/arm/pl310.c

216

while (pl310_read4(pl310_softc, off) & mask)

sys/arm/arm/pl310.c

235

if ((pl310_softc == NULL) || !pl310_softc->sc_enabled)

sys/arm/arm/pl310.c

239

if (pl310_softc->sc_io_coherent)

sys/arm/arm/pl310.c

243

if (pl310_softc->sc_rtl_revision == CACHE_ID_RELEASE_r3p0)

sys/arm/arm/pl310.c

245

pl310_write4(pl310_softc, 0x740, 0xffffffff);

sys/arm/arm/pl310.c

248

pl310_write4(pl310_softc, PL310_CACHE_SYNC, 0xffffffff);

sys/arm/arm/pl310.c

255

if ((pl310_softc == NULL) || !pl310_softc->sc_enabled)

sys/arm/arm/pl310.c

258

PL310_LOCK(pl310_softc);

sys/arm/arm/pl310.c

260

if (pl310_softc->sc_rtl_revision == CACHE_ID_RELEASE_r2p0) {

sys/arm/arm/pl310.c

265

pl310_write4(pl310_softc,

sys/arm/arm/pl310.c

271

PL310_UNLOCK(pl310_softc);

sys/arm/arm/pl310.c

274

if (pl310_softc->sc_rtl_revision == CACHE_ID_RELEASE_r3p0)

sys/arm/arm/pl310.c

275

platform_pl310_write_debug(pl310_softc, 3);

sys/arm/arm/pl310.c

277

pl310_write4(pl310_softc, PL310_CLEAN_INV_WAY, g_l2cache_way_mask);

sys/arm/arm/pl310.c

281

if (pl310_softc->sc_rtl_revision == CACHE_ID_RELEASE_r3p0)

sys/arm/arm/pl310.c

282

platform_pl310_write_debug(pl310_softc, 0);

sys/arm/arm/pl310.c

284

PL310_UNLOCK(pl310_softc);

sys/arm/arm/pl310.c

291

if ((pl310_softc == NULL) || !pl310_softc->sc_enabled)

sys/arm/arm/pl310.c

294

PL310_LOCK(pl310_softc);

sys/arm/arm/pl310.c

305

if (pl310_softc->sc_rtl_revision >= CACHE_ID_RELEASE_r2p0 &&

sys/arm/arm/pl310.c

306

pl310_softc->sc_rtl_revision < CACHE_ID_RELEASE_r3p1)

sys/arm/arm/pl310.c

307

platform_pl310_write_debug(pl310_softc, 3);

sys/arm/arm/pl310.c

311

if (pl310_softc->sc_rtl_revision <= CACHE_ID_RELEASE_r1p0) {

sys/arm/arm/pl310.c

318

pl310_write4(pl310_softc, PL310_CLEAN_LINE_PA, start);

sys/arm/arm/pl310.c

319

pl310_write4(pl310_softc, PL310_INV_LINE_PA, start);

sys/arm/arm/pl310.c

322

pl310_write4(pl310_softc, PL310_CLEAN_INV_LINE_PA,

sys/arm/arm/pl310.c

328

if (pl310_softc->sc_rtl_revision >= CACHE_ID_RELEASE_r2p0 &&

sys/arm/arm/pl310.c

329

pl310_softc->sc_rtl_revision < CACHE_ID_RELEASE_r3p1)

sys/arm/arm/pl310.c

330

platform_pl310_write_debug(pl310_softc, 0);

sys/arm/arm/pl310.c

334

PL310_UNLOCK(pl310_softc);

sys/arm/arm/pl310.c

341

if ((pl310_softc == NULL) || !pl310_softc->sc_enabled)

sys/arm/arm/pl310.c

344

PL310_LOCK(pl310_softc);

sys/arm/arm/pl310.c

356

pl310_write4(pl310_softc, PL310_CLEAN_LINE_PA, start);

sys/arm/arm/pl310.c

362

PL310_UNLOCK(pl310_softc);

sys/arm/arm/pl310.c

369

if ((pl310_softc == NULL) || !pl310_softc->sc_enabled)

sys/arm/arm/pl310.c

372

PL310_LOCK(pl310_softc);

sys/arm/arm/pl310.c

382

pl310_write4(pl310_softc, PL310_INV_LINE_PA, start);

sys/arm/arm/pl310.c

388

PL310_UNLOCK(pl310_softc);

sys/arm/arm/pl310.c

395

if ((pl310_softc == NULL) || !pl310_softc->sc_enabled)

sys/arm/arm/pl310.c

398

PL310_LOCK(pl310_softc);

sys/arm/arm/pl310.c

400

PL310_UNLOCK(pl310_softc);

sys/arm/arm/pl310.c

404

pl310_set_way_sizes(struct pl310_softc *sc)

sys/arm/arm/pl310.c

429

struct pl310_softc * sc;

sys/arm/arm/pl310.c

474

struct pl310_softc *sc = device_get_softc(dev);

sys/arm/arm/pl310.c

494

pl310_softc = sc;

sys/arm/arm/pl310.c

544

pl310_write4(pl310_softc, PL310_INV_WAY, 0xffff);

sys/arm/arm/pl310.c

586

sizeof(struct pl310_softc),

sys/arm/arm/pl310.c

91

static struct pl310_softc *pl310_softc;

sys/arm/freescale/imx/imx6_machdep.h

30

struct pl310_softc;

sys/arm/freescale/imx/imx6_machdep.h

34

void imx6_pl310_init(platform_t, struct pl310_softc *);

sys/arm/freescale/imx/imx6_pl310.c

50

imx6_pl310_init(platform_t plat, struct pl310_softc *sc)

sys/arm/include/pl310.h

168

pl310_read4(struct pl310_softc *sc, bus_size_t off)

sys/arm/include/pl310.h

175

pl310_write4(struct pl310_softc *sc, bus_size_t off, uint32_t val)

sys/arm/include/pl310.h

181

void pl310_set_ram_latency(struct pl310_softc *sc, uint32_t which_reg,

sys/arm/include/pl310.h

185

void platform_pl310_init(struct pl310_softc *);

sys/arm/include/pl310.h

186

void platform_pl310_write_ctrl(struct pl310_softc *, uint32_t);

sys/arm/include/pl310.h

187

void platform_pl310_write_debug(struct pl310_softc *, uint32_t);

sys/arm/mv/armada38x/armada38x_pl310.c

48

mv_a38x_platform_pl310_init(platform_t plat, struct pl310_softc *sc)

sys/arm/mv/armada38x/armada38x_pl310.c

69

mv_a38x_platform_pl310_write_ctrl(platform_t plat, struct pl310_softc *sc, uint32_t val)

sys/arm/mv/armada38x/armada38x_pl310.c

76

mv_a38x_platform_pl310_write_debug(platform_t plat, struct pl310_softc *sc, uint32_t val)

sys/arm/mv/armada38x/armada38x_pl310.h

31

void mv_a38x_platform_pl310_init(platform_t plat, struct pl310_softc *sc);

sys/arm/mv/armada38x/armada38x_pl310.h

32

void mv_a38x_platform_pl310_write_ctrl(platform_t plat, struct pl310_softc *sc, uint32_t val);

sys/arm/mv/armada38x/armada38x_pl310.h

33

void mv_a38x_platform_pl310_write_debug(platform_t plat, struct pl310_softc *sc, uint32_t val);

sys/arm/xilinx/zy7_l2cache.c

46

zynq7_pl310_init(platform_t plat, struct pl310_softc *softc)

sys/arm/xilinx/zy7_machdep.h

29

struct pl310_softc;

sys/arm/xilinx/zy7_machdep.h

34

void zynq7_pl310_init(platform_t, struct pl310_softc *);