pg_nx
pg_nx = PG_NX;
mptramp_nx = pg_nx != 0;
*pdpe = mphys | X86_PG_A | X86_PG_RW | X86_PG_V | pg_nx;
*pde = mphys | X86_PG_A | X86_PG_RW | X86_PG_V | pg_nx;
X86_PG_V | X86_PG_A | pg_nx |
X86_PG_V | X86_PG_A | pg_nx |
X86_PG_A | pg_nx | pmap_cache_bits(kernel_pmap,
mphys = *pde & ~(PAGE_MASK | pg_nx);
mphys = *pde & ~(PAGE_MASK | pg_nx);
(exec ? 0 : pg_nx) | pmap_cache_bits(kernel_pmap,
X86_PG_V | pg_nx);
X86_PG_PS | X86_PG_V | X86_PG_A | X86_PG_M | pg_nx);
X86_PG_V | pg_nx);
X86_PG_M | X86_PG_A | pg_nx);
(range->attrs & pg_nx) != 0 ? '-' : 'x',
mask = X86_PG_G | X86_PG_RW | X86_PG_U | X86_PG_PDE_CACHE | pg_nx;
attrs = pml5e & (X86_PG_RW | X86_PG_U | pg_nx);
attrs |= pml4e & pg_nx;
attrs &= pg_nx | (pml4e & (X86_PG_RW | X86_PG_U));
attrs = pml4e & (X86_PG_RW | X86_PG_U | pg_nx);
attrs |= pdpe & pg_nx;
attrs &= pg_nx | (pdpe & (X86_PG_RW | X86_PG_U));
attrs |= pde & pg_nx;
attrs &= pg_nx | (pde & (X86_PG_RW | X86_PG_U));
attrs |= pte & pg_nx;
attrs &= pg_nx | (pte & (X86_PG_RW | X86_PG_U));
return (X86_PG_RW | pg_nx);
return (X86_PG_RW | pg_nx);
return (pg_nx);
X86_PG_RW | pg_nx;
pdp_p[kasankpdpi] = (KASANPDphys | X86_PG_RW | X86_PG_V | pg_nx);
X86_PG_V | pg_nx;
X86_PG_M | X86_PG_A | pg_nx;
X86_PG_M | X86_PG_A | pg_nx;
X86_PG_M | X86_PG_A | pg_nx;
pdp_p[i] |= X86_PG_RW | X86_PG_V | pg_nx;
pg_nx;
X86_PG_A | pg_nx | bootaddr_rwx(pax);
X86_PG_RW | X86_PG_V | pg_nx;
p4_p[KASANPML4I + i] |= X86_PG_RW | X86_PG_V | pg_nx;
p4_p[KMSANSHADPML4I + i] |= X86_PG_RW | X86_PG_V | pg_nx;
p4_p[KMSANORIGPML4I + i] |= X86_PG_RW | X86_PG_V | pg_nx;
X86_PG_M | X86_PG_V | pg_nx;
X86_PG_RW | X86_PG_V | pg_nx;
p4_p[PML4PML4I] |= X86_PG_RW | X86_PG_V | pg_nx;
pcpu_pte[0] = pcpu0_phys | X86_PG_V | X86_PG_RW | pg_g | pg_nx |
pg_nx | VM_PAGE_TO_PHYS(m);
pg_nx | VM_PAGE_TO_PHYS(m);
pte_store(pte, pa | pg_g | pg_nx | X86_PG_A | X86_PG_M |
pte_store(pte, pa | pg_g | pg_nx | X86_PG_A | X86_PG_M |
pte_store(pte, pa | pg_g | pg_nx | X86_PG_A |
pt_entry_t pg_nx;
X86_PG_V | pg_nx;
X86_PG_RW | X86_PG_V | pg_nx;
X86_PG_RW | X86_PG_V | pg_nx;
*pml5 |= pg_nx;
*pml4 |= pg_nx;
X86_PG_A | X86_PG_M | pg_nx);
pde[i] = (pd_entry_t)(dummypt | X86_PG_V | X86_PG_RW | pg_nx);
X86_PG_RW | pg_nx);
X86_PG_M | PG_PS | pg_g | pg_nx);
newpde |= pg_nx;
pbits |= pg_nx;
pbits |= pg_nx;
pbits |= pg_nx;
newpte |= pg_nx;
newpde |= pg_nx;
newpte |= pg_nx;
pde_bits |= pg_nx;
pte_bits |= pg_nx;
pde_mask |= X86_PG_RW | pg_nx;
pte_mask |= X86_PG_RW | pg_nx;
pg_nx != 0 && (frame->tf_err & (PGEX_P | PGEX_W |
else if ((frame->tf_err & PGEX_I) && pg_nx != 0)
extern pt_entry_t pg_nx;
pte_store(pte, pa | pg_nx | PG_RW | PG_V);
pt_entry_t pg_nx;
newpde |= pg_nx;
pbits |= pg_nx;
newpte |= pg_nx;
newpde |= pg_nx;
newpte |= pg_nx;
pg_nx = PG_NX;
(range->attrs & pg_nx) != 0 ? '-' : 'x',
mask = pg_nx | PG_G | PG_RW | PG_U | PG_PDE_CACHE;
attrs = pde & (PG_RW | PG_U | pg_nx);
attrs |= pte & pg_nx;
attrs &= pg_nx | (pte & (PG_RW | PG_U));
extern uint64_t pg_nx;
else if ((frame->tf_err & PGEX_I) && pg_nx != 0)
pg_nx != 0 ?
extern pt_entry_t pg_nx;