sys/arm64/qoriq/qoriq_dw_pci.c

114

reg = pci_dw_dbi_rd4(sc->dev, DW_MISC_CONTROL_1);

sys/arm64/qoriq/qoriq_dw_pci.c

129

cause1 = pci_dw_dbi_rd4(sc->dev, MV_INT_CAUSE1);

sys/arm64/qoriq/qoriq_dw_pci.c

130

cause2 = pci_dw_dbi_rd4(sc->dev, MV_INT_CAUSE2);

sys/arm64/qoriq/qoriq_dw_pci.c

145

reg = pci_dw_dbi_rd4(sc->dev, sc->soc_cfg->pex_pf0_dgb);

sys/dev/pci/pci_dw.c

69

#define DBI_RD4(sc, reg) pci_dw_dbi_rd4((sc)->dev, reg)

sys/dev/pci/pci_dw_mv.c

144

reg = pci_dw_dbi_rd4(sc->dev, MV_GLOBAL_CONTROL_REG);

sys/dev/pci/pci_dw_mv.c

158

reg = pci_dw_dbi_rd4(sc->dev, MV_INT_MASK1);

sys/dev/pci/pci_dw_mv.c

180

cause1 = pci_dw_dbi_rd4(sc->dev, MV_INT_CAUSE1);

sys/dev/pci/pci_dw_mv.c

181

cause2 = pci_dw_dbi_rd4(sc->dev, MV_INT_CAUSE2);

sys/dev/pci/pci_dw_mv.c

193

reg = pci_dw_dbi_rd4(dev, MV_GLOBAL_STATUS_REG);

sys/riscv/sifive/fu740_pci_dw.c

291

reg = pci_dw_dbi_rd4(sc->dev, DW_MISC_CONTROL_1);

sys/riscv/sifive/fu740_pci_dw.c

441

reg = pci_dw_dbi_rd4(dev, FUDW_DBI_PORT_DBG1);