p_virt
void **p_virt = &p_mngr->t2[i].p_virt;
*p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
if (!p_mngr->t2[i].p_virt) {
OSAL_MEM_ZERO(*p_virt, size);
struct src_ent *entries = p_mngr->t2[i].p_virt;
if (p_dma->p_virt)
p_dma->p_virt,
p_dma->p_virt = OSAL_NULL;
void *p_virt;
p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
if (!p_virt)
OSAL_MEM_ZERO(p_virt, size);
ilt_shadow[line].p_virt = p_virt;
line, (unsigned long long)p_phys, p_virt, size);
if (p_shdw[line].p_virt != OSAL_NULL) {
void *p_virt;
if (!p_mngr->ilt_shadow[line].p_virt)
p_info->p_cxt = (u8 *)p_mngr->ilt_shadow[line].p_virt +
p_info->blocks[i] = p_mngr->ilt_shadow[shadow_line].p_virt;
void *p_virt;
if (p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].p_virt)
p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
if (!p_virt) {
OSAL_MEM_ZERO(p_virt, p_blk->real_size_in_page);
u8 *elem_start = (u8 *)p_virt;
p_hwfn->p_cxt_mngr->ilt_shadow[shadow_line].p_virt = p_virt;
if (!p_hwfn->p_cxt_mngr->ilt_shadow[i].p_virt)
p_hwfn->p_cxt_mngr->ilt_shadow[i].p_virt,
p_hwfn->p_cxt_mngr->ilt_shadow[i].p_virt = OSAL_NULL;
*pp_task_ctx = (u8 *)p_mngr->ilt_shadow[ilt_idx].p_virt +
if (p_mngr->t2[i].p_virt)
p_mngr->t2[i].p_virt,
void *p_virt = p_chain->p_virt_addr, *p_virt_next = OSAL_NULL;
if (!p_virt)
if (!p_virt)
p_next = (struct ecore_chain_next *)((u8 *)p_virt + size);
OSAL_DMA_FREE_COHERENT(p_dev, p_virt, p_phys,
p_virt = p_virt_next;
void *p_virt = OSAL_NULL, *p_virt_prev = OSAL_NULL;
p_virt = OSAL_DMA_ALLOC_COHERENT(p_dev, &p_phys,
if (!p_virt) {
ecore_chain_init_mem(p_chain, p_virt, p_phys);
p_virt, p_phys);
p_virt_prev = p_virt;
void *p_virt = OSAL_NULL;
p_virt = OSAL_DMA_ALLOC_COHERENT(p_dev, &p_phys, ECORE_CHAIN_PAGE_SIZE);
if (!p_virt) {
ecore_chain_init_mem(p_chain, p_virt, p_phys);
void *p_virt = OSAL_NULL;
p_virt = OSAL_DMA_ALLOC_COHERENT(p_dev, &p_phys,
if (!p_virt) {
ecore_chain_init_mem(p_chain, p_virt, p_phys);
p_chain->pbl.pp_virt_addr_tbl[i] = p_virt;
void *p_virt;
p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, &p_phys, 2 * size);
if (!p_virt) {
for (p_tmp = (u32 *)p_virt;
p_tmp < (u32 *)((u8 *)p_virt + size);
OSAL_MEM_ZERO((u8 *)p_virt + size, size);
phase, (unsigned long long)p_phys, p_virt,
(unsigned long long)(p_phys + size), (u8 *)p_virt + size,
for (p_tmp = (u32 *)((u8 *)p_virt + size);
p_tmp < (u32 *)((u8 *)p_virt + (2 * size));
(unsigned long long)(p_phys + (u32)((u8 *)p_tmp - (u8 *)p_virt)),
OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_virt, p_phys, 2 * size);
void *p_virt;
p_virt = OSAL_DMA_ALLOC_COHERENT(p_dev, &p_phys,
if (!p_virt) {
ecore_int_sb_attn_init(p_hwfn, p_ptt, p_virt, p_phys);
void *p_virt;
p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
if (!p_virt) {
p_virt, p_phys, ECORE_SP_SB_ID);
void *p_virt;
p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
if (!p_virt) {
p_buf->rx_buffer_virt_addr = p_virt;
struct ecore_spq_entry *p_virt = OSAL_NULL;
p_virt = p_spq->p_virt;
DMA_REGPAIR_LE(p_virt->elem.data_ptr, p_phys);
OSAL_LIST_PUSH_TAIL(&p_virt->list, &p_spq->free_pool);
p_virt++;
struct ecore_spq_entry *p_virt = OSAL_NULL;
p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev, &p_phys,
if (!p_virt) {
p_spq->p_virt = p_virt;
if (p_spq->p_virt) {
p_spq->p_virt,
p_bulletin = p_vf->bulletin.p_virt;
if (vf->bulletin.p_virt)
OSAL_MEMSET(vf->bulletin.p_virt, 0,
sizeof(*vf->bulletin.p_virt));
p_vf->bulletin.p_virt->mac,
filter.vlan = p_vf->bulletin.p_virt->pvid;
p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
vf_info->bulletin.p_virt->default_only_untagged = vf_req;
params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
if (p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED))
if (p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED))
struct ecore_bulletin_content *p_bulletin = vf->bulletin.p_virt;
p_bulletin = p_vf->bulletin.p_virt;
p_bulletin = p_vf->bulletin.p_virt;
OSAL_MEMCPY(vf_info->bulletin.p_virt->mac,
vf_info->bulletin.p_virt->valid_bitmap |= feature;
vf_info->bulletin.p_virt->valid_bitmap &=
if (vf_info->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
OSAL_MEMCPY(vf_info->bulletin.p_virt->mac,
vf_info->bulletin.p_virt->valid_bitmap |= feature;
vf_info->bulletin.p_virt->valid_bitmap |= feature;
vf_info->bulletin.p_virt->default_only_untagged = b_untagged_only ? 1
vf_info->bulletin.p_virt->pvid = pvid;
vf_info->bulletin.p_virt->valid_bitmap |= feature;
vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
vf_info->bulletin.p_virt->vxlan_udp_port = vxlan_port;
vf_info->bulletin.p_virt->geneve_udp_port = geneve_port;
if (!p_vf || !p_vf->bulletin.p_virt)
if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)))
return p_vf->bulletin.p_virt->mac;
if (!p_vf || !p_vf->bulletin.p_virt)
if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
return p_vf->bulletin.p_virt->pvid;
vf->bulletin.p_virt = p_bulletin_virt + idx;
crc_size = sizeof(p_iov->bulletin.p_virt->crc);
OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size);
if (p_iov->bulletin.p_virt) {
p_iov->bulletin.p_virt,
p_iov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
p_iov->bulletin.p_virt,
struct ecore_bulletin_content *p_virt;
union eth_tx_bd_types *p_virt;
sizeof(*p_virt),