sys/dev/pci/pci_dw.c
145
DBI_WR4(sc, DW_MISC_CONTROL_1, reg);
sys/dev/pci/pci_dw.c
207
DBI_WR4(sc, DW_IATU_VIEWPORT, IATU_REGION_INDEX(~0U));
sys/dev/pci/pci_dw.c
223
DBI_WR4(sc, DW_IATU_VIEWPORT, IATU_REGION_INDEX(i));
sys/dev/pci/pci_dw.c
224
DBI_WR4(sc, DW_IATU_LWR_TARGET_ADDR, 0x12340000);
sys/dev/pci/pci_dw.c
292
DBI_WR4(sc, DW_IATU_VIEWPORT, IATU_REGION_INDEX(idx));
sys/dev/pci/pci_dw.c
293
DBI_WR4(sc, DW_IATU_LWR_BASE_ADDR, pa & 0xFFFFFFFF);
sys/dev/pci/pci_dw.c
294
DBI_WR4(sc, DW_IATU_UPPER_BASE_ADDR, (pa >> 32) & 0xFFFFFFFF);
sys/dev/pci/pci_dw.c
295
DBI_WR4(sc, DW_IATU_LIMIT_ADDR, (pa + size - 1) & 0xFFFFFFFF);
sys/dev/pci/pci_dw.c
296
DBI_WR4(sc, DW_IATU_LWR_TARGET_ADDR, pci_addr & 0xFFFFFFFF);
sys/dev/pci/pci_dw.c
297
DBI_WR4(sc, DW_IATU_UPPER_TARGET_ADDR, (pci_addr >> 32) & 0xFFFFFFFF);
sys/dev/pci/pci_dw.c
298
DBI_WR4(sc, DW_IATU_CTRL1, IATU_CTRL1_TYPE(type));
sys/dev/pci/pci_dw.c
299
DBI_WR4(sc, DW_IATU_CTRL2, IATU_CTRL2_REGION_EN);
sys/dev/pci/pci_dw.c
338
DBI_WR4(sc, PCIR_BAR(0), 4);
sys/dev/pci/pci_dw.c
339
DBI_WR4(sc, PCIR_BAR(1), 0);
sys/dev/pci/pci_dw.c
397
DBI_WR4(sc, DW_PORT_LINK_CTRL, reg);
sys/dev/pci/pci_dw.c
422
DBI_WR4(sc, DW_GEN2_CTRL, reg);
sys/dev/pci/pci_dw.c
426
DBI_WR4(sc, DW_GEN2_CTRL, reg);