sys/dev/pms/RefTisa/sallsdk/api/saosapi.h

73

#ifndef ossaHwRegWriteExt

sys/dev/pms/RefTisa/sallsdk/api/saosapi.h

75

void ossaHwRegWriteExt(

sys/dev/pms/RefTisa/sallsdk/spc/mpi.c

441

ossaHwRegWriteExt(circularQ->agRoot,

sys/dev/pms/RefTisa/sallsdk/spc/mpi.c

451

ossaHwRegWriteExt(circularQ->agRoot,

sys/dev/pms/RefTisa/sallsdk/spc/mpi.c

587

ossaHwRegWriteExt(circularQ->agRoot,

sys/dev/pms/RefTisa/sallsdk/spc/mpi.c

624

ossaHwRegWriteExt(circularQ->agRoot,

sys/dev/pms/RefTisa/sallsdk/spc/mpi.c

705

ossaHwRegWriteExt(circularQ->agRoot,

sys/dev/pms/RefTisa/sallsdk/spc/mpi.c

749

ossaHwRegWriteExt(circularQ->agRoot,

sys/dev/pms/RefTisa/sallsdk/spc/mpi.c

775

ossaHwRegWriteExt(agRoot,

sys/dev/pms/RefTisa/sallsdk/spc/mpi.c

863

ossaHwRegWriteExt(circularQ->agRoot,

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1000

ossaHwRegWriteExt(agRoot, PCIBAR2, MBIC_NMI_ENABLE_VPE0_AAP1, 0x0); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1004

ossaHwRegWriteExt(agRoot, PCIBAR1, PCIE_EVENT_INTERRUPT_ENABLE, 0x0); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1008

ossaHwRegWriteExt(agRoot, PCIBAR1, PCIE_EVENT_INTERRUPT, regVal); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1012

ossaHwRegWriteExt(agRoot, PCIBAR1, PCIE_ERROR_INTERRUPT_ENABLE, 0x0); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1016

ossaHwRegWriteExt(agRoot, PCIBAR1, PCIE_ERROR_INTERRUPT, regVal); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1055

ossaHwRegWriteExt(agRoot, PCIBAR2, GSM_CONFIG_RESET, regVal); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1073

ossaHwRegWriteExt(agRoot, PCIBAR2, GSM_READ_ADDR_PARITY_CHECK, 0x0); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1079

ossaHwRegWriteExt(agRoot, PCIBAR2, GSM_WRITE_ADDR_PARITY_CHECK, 0x0); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1085

ossaHwRegWriteExt(agRoot, PCIBAR2, GSM_WRITE_DATA_PARITY_CHECK, 0x0); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1107

ossaHwRegWriteExt(agRoot, PCIBAR2, GPIO_GPIO_0_0UTPUT_CTL_OFFSET, regVal); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1126

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_RESET, regVal); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1134

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_RESET, regVal); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1148

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_RESET, regVal); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1180

ossaHwRegWriteExt(agRoot, PCIBAR2, GSM_CONFIG_RESET, regVal); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1196

ossaHwRegWriteExt(agRoot, PCIBAR2, GSM_READ_ADDR_PARITY_CHECK, regVal1); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1202

ossaHwRegWriteExt(agRoot, PCIBAR2, GSM_WRITE_ADDR_PARITY_CHECK, regVal2); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1208

ossaHwRegWriteExt(agRoot, PCIBAR2, GSM_WRITE_DATA_PARITY_CHECK, regVal3); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1228

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_RESET, regVal); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1349

ossaHwRegWriteExt(agRoot, PCIBAR0, V_MEMBASE_II_ShiftRegister, shiftValue);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1369

ossaHwRegWriteExt(agRoot, PCIBAR1, SPC_IBW_AXI_TRANSLATION_LOW, shiftValue);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1591

ossaHwRegWriteExt(agRoot, PCIBAR3, HDA_CMD_OFFSET1MB, 0);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1592

ossaHwRegWriteExt(agRoot, PCIBAR3, HDA_CMD_OFFSET1MB+HDA_PAR_LEN_OFFSET, flashImg.ilaLen);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1597

ossaHwRegWriteExt(agRoot, PCIBAR3, HDA_CMD_OFFSET1MB+HDA_CMD_CODE_OFFSET, regVal); /* Execute Command */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

1819

ossaHwRegWriteExt(agRoot, busBaseNumber, (dstoffset + i * 4), val);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2045

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+0,hdacmd.cmdparm_0);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2046

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+4,hdacmd.cmdparm_1);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2047

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+8,hdacmd.cmdparm_2);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2048

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+12,hdacmd.cmdparm_3);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2049

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+16,hdacmd.cmdparm_4);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2050

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+20,hdacmd.cmdparm_5);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2051

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+24,hdacmd.cmdparm_6);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2052

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+28,hdacmd.C_PA_SEQ_ID_CMD_CODE);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2174

ossaHwRegWriteExt(agRoot, PCIBAR0,MSGU_HOST_SCRATCH_PAD_3 ,HDA_ISTR_DONE );

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2207

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+0 ,hdacmd.cmdparm_0);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2208

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+4 ,hdacmd.cmdparm_1);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2209

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+8 ,hdacmd.cmdparm_2);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2210

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+12,hdacmd.cmdparm_3);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2211

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+16,hdacmd.cmdparm_4);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2212

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+20,hdacmd.cmdparm_5);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2213

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+24,hdacmd.cmdparm_6);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2214

ossaHwRegWriteExt(agRoot, PCIBAR0, SPC_V_HDA_COMMAND_OFFSET+28,hdacmd.C_PA_SEQ_ID_CMD_CODE);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2358

ossaHwRegWriteExt(agRoot, PCIBAR0,MSGU_HOST_SCRATCH_PAD_3 ,(ILAHDAC_RAAE_IMG_DONE << SHIFT24) | userFwImg->aap1Len );

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2427

ossaHwRegWriteExt(agRoot, PCIBAR0,MSGU_HOST_SCRATCH_PAD_3 ,(ILAHDAC_IOP_IMG_DONE << SHIFT24) | userFwImg->iopLen );

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2679

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_RB6_OFFSET , RB6_MAGIC_NUMBER_RST);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2681

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_RB6_OFFSET , RB6_MAGIC_NUMBER_RST);

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

2891

ossaHwRegWriteExt(agRoot,

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

599

ossaHwRegWriteExt(agRoot, PCIBAR0, V_SoftResetRegister, regVal); /* siChipResetV */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

847

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_RESET, regVal); /* siChipResetSpc */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

855

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_RESET, regVal); /* siChipResetSpc */

sys/dev/pms/RefTisa/sallsdk/spc/sahw.c

985

ossaHwRegWriteExt(agRoot, PCIBAR2, MBIC_NMI_ENABLE_VPE0_IOP, 0x0); /* siSpcSoftReset */

sys/dev/pms/RefTisa/sallsdk/spc/sahwreg.h

434

#define SPC_WRITE_RESET_REG(value) ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_RESET, value);

sys/dev/pms/RefTisa/sallsdk/spc/sahwreg.h

507

#define SPC_WRITE_COUNTER_CNTL(phyId, value) ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_SSPL_COUNTER_CNTL + (COUNT_OFFSET * phyId), value)

sys/dev/pms/RefTisa/sallsdk/spc/sahwreg.h

516

#define SPC_WRITE_L0ERR_CNT_CNTL(phyId, value) ossaHwRegWriteExt(agRoot, PCIBAR1, SPC_L0_ERR_CNT_CNTL + (CNTL_OFFSET * phyId), value)

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

1400

ossaHwRegWriteExt(agRoot, PCIBAR1, SPC_ICTIMER,hwConfig->hwInterruptCoalescingTimer );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

1401

ossaHwRegWriteExt(agRoot, PCIBAR1, SPC_ICCONTROL, hwConfig->hwInterruptCoalescingControl);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

1531

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Clear_Register, 0xFFFFFFFF );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2141

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_IQNPPD_HPPD_OFFSET),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2150

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_IO_ABORT_DELAY),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2164

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_OB_HW_EVENT_PID03_OFFSET),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2166

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_OB_HW_EVENT_PID47_OFFSET),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2168

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_OB_NCQ_EVENT_PID03_OFFSET),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2170

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_OB_NCQ_EVENT_PID47_OFFSET),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2172

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_TITNX_EVENT_PID03_OFFSET),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2174

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_TITNX_EVENT_PID47_OFFSET),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2176

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_OB_SSP_EVENT_PID03_OFFSET),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2178

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_OB_SSP_EVENT_PID47_OFFSET),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2180

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_CUSTOMER_SETTING),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2186

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_IO_ABORT_DELAY),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2204

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_IO_ABORT_DELAY),

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2210

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_EVENT_LOG_ADDR_HI), mainCfg.upperEventLogAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2211

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_EVENT_LOG_ADDR_LO), mainCfg.lowerEventLogAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2212

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_EVENT_LOG_BUFF_SIZE), mainCfg.eventLogSize);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2213

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_EVENT_LOG_OPTION), mainCfg.eventLogOption);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2214

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_IOP_EVENT_LOG_ADDR_HI), mainCfg.upperIOPeventLogAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2215

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_IOP_EVENT_LOG_ADDR_LO), mainCfg.lowerIOPeventLogAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2216

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_IOP_EVENT_LOG_BUFF_SIZE), mainCfg.IOPeventLogSize);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2217

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_IOP_EVENT_LOG_OPTION), mainCfg.IOPeventLogOption);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2218

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_FATAL_ERROR_INTERRUPT), mainCfg.FatalErrorInterrupt);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2219

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_PRECTD_PRESETD), mainCfg.portRecoveryResetTimer);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2232

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(MSGUCfgTblDWIdx + MAIN_IRAD_RESERVED), mainCfg.interruptReassertionDelay);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2567

ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4) , context->value);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2572

ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2577

ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2582

ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2587

ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2592

ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2597

ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2602

ossaHwRegWriteExt(agRoot, pcibar, OffsetInMain + (context->offset * 4), context->value);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2769

ossaHwRegWriteExt(circularIQ->agRoot, circularIQ->PIPCIBar, circularIQ->PIPCIOffset, 0);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

2787

ossaHwRegWriteExt(circularOQ->agRoot, circularOQ->CIPCIBar, circularOQ->CIPCIOffset, 0);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3556

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + IB_PROPERITY_OFFSET), inQueueCfg->elementPriSizeCount);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3557

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + IB_BASE_ADDR_HI_OFFSET), inQueueCfg->upperBaseAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3558

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + IB_BASE_ADDR_LO_OFFSET), inQueueCfg->lowerBaseAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3559

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + IB_CI_BASE_ADDR_HI_OFFSET), inQueueCfg->ciUpperBaseAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3560

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + IB_CI_BASE_ADDR_LO_OFFSET), inQueueCfg->ciLowerBaseAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3594

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + OB_PROPERITY_OFFSET), outQueueCfg->elementSizeCount);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3595

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + OB_BASE_ADDR_HI_OFFSET), outQueueCfg->upperBaseAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3596

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + OB_BASE_ADDR_LO_OFFSET), outQueueCfg->lowerBaseAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3597

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + OB_PI_BASE_ADDR_HI_OFFSET), outQueueCfg->piUpperBaseAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3598

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + OB_PI_BASE_ADDR_LO_OFFSET), outQueueCfg->piLowerBaseAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3599

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(QueueTableOffset + OB_INTERRUPT_COALES_OFFSET), outQueueCfg->interruptVecCntDelay);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3636

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(FerrTableOffset + MPI_FATAL_EDUMP_TABLE_LO_OFFSET), lowerBaseAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3637

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(FerrTableOffset + MPI_FATAL_EDUMP_TABLE_HI_OFFSET), upperBaseAddress);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3638

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(FerrTableOffset + MPI_FATAL_EDUMP_TABLE_LENGTH), length);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3639

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(FerrTableOffset + MPI_FATAL_EDUMP_TABLE_HANDSHAKE), 0);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

3640

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(FerrTableOffset + MPI_FATAL_EDUMP_TABLE_STATUS), 0);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4148

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_PORT_CFG1_OFFSET), mpiCALTable->spaReg0);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4149

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_PORT_CFG2_OFFSET), mpiCALTable->spaReg1);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4150

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_PORT_CFG3_OFFSET), mpiCALTable->spaReg2);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4151

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + TX_CFG_OFFSET), mpiCALTable->spaReg3);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4152

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_PORT_CFG1_OFFSET), mpiCALTable->spaReg4);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4153

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_PORT_CFG2_OFFSET), mpiCALTable->spaReg5);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4154

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_CFG1_OFFSET), mpiCALTable->spaReg6);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4155

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(CALTableOffset + RV_CFG2_OFFSET), mpiCALTable->spaReg7);

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4219

ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 0 ),config->phyAnalogConfig.phyAnalogSetupRegisters[phy].spaRegister0 );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4220

ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 4 ),config->phyAnalogConfig.phyAnalogSetupRegisters[phy].spaRegister1 );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4221

ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 8 ),config->phyAnalogConfig.phyAnalogSetupRegisters[phy].spaRegister2 );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4222

ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 12),config->phyAnalogConfig.phyAnalogSetupRegisters[phy].spaRegister3 );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4223

ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 16),config->phyAnalogConfig.phyAnalogSetupRegisters[phy].spaRegister4 );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4224

ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 20),config->phyAnalogConfig.phyAnalogSetupRegisters[phy].spaRegister5 );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4225

ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 24),config->phyAnalogConfig.phyAnalogSetupRegisters[phy].spaRegister6 );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4226

ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 28),config->phyAnalogConfig.phyAnalogSetupRegisters[phy].spaRegister7 );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4227

ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 32),config->phyAnalogConfig.phyAnalogSetupRegisters[phy].spaRegister8 );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4228

ossaHwRegWriteExt(agRoot, pcibar,(AnalogTableBase + ( AnalogtableSize * phy)+ 36),config->phyAnalogConfig.phyAnalogSetupRegisters[phy].spaRegister9 );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4289

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(INTVTableOffset + INT_VT_Coal_CNT_TO + i * sizeof(InterruptVT_t)), ValuetoWrite );

sys/dev/pms/RefTisa/sallsdk/spc/sainit.c

4337

ossaHwRegWriteExt(agRoot, pcibar, (bit32)(PHYTableOffset + i * sizeof(phyAttrb_t)), phyAttrib->phyAttribute[i].phyEventOQ);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1090

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Clear_Register, mask);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1091

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Clear_Register, mask );

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1385

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_Register, AGSA_INTERRUPT_HANDLE_ALL_CHANNELS);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1386

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_RegisterU, AGSA_INTERRUPT_HANDLE_ALL_CHANNELS);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1411

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Clear_Register, 0xFFFFFFFF);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1412

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Clear_RegisterU, 0xFFFFFFFF);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1437

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_Register, AGSA_INTERRUPT_HANDLE_ALL_CHANNELS);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

1438

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_RegisterU, AGSA_INTERRUPT_HANDLE_ALL_CHANNELS);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

514

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_RegisterU,u64.S32[1]);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

516

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_Register, u64.S32[0]);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

618

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_Register,u64.S32[1] );

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

620

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Set_RegisterU,u64.S32[0]);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

945

ossaHwRegWriteExt(agRoot, PCIBAR0,msi_index, MSIX_INTERRUPT_ENABLE);

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

984

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Clear_RegisterU,u64.S32[1] );

sys/dev/pms/RefTisa/sallsdk/spc/saint.c

986

ossaHwRegWriteExt(agRoot, PCIBAR0,V_Outbound_Doorbell_Mask_Clear_Register,u64.S32[0]);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2372

ossaHwRegWriteExt(agRoot, 0,V_Inbound_Doorbell_Set_Register, SPCV_MSGU_CFG_TABLE_TRANSFER_DEBUG_INFO );

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2418

ossaHwRegWriteExt(agRoot,pcibar ,ErrorTableOffset+MPI_FATAL_EDUMP_TABLE_HANDSHAKE, MPI_FATAL_EDUMP_HANDSHAKE_RDY );

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2501

ossaHwRegWriteExt(agRoot, pcibar,V_MEMBASE_II_ShiftRegister, saRoot->FatalForensicShiftOffset); // set base to zero

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2565

ossaHwRegWriteExt(agRoot, pcibar,V_MEMBASE_II_ShiftRegister, saRoot->FatalForensicShiftOffset);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2600

ossaHwRegWriteExt(agRoot, pcibar,V_MEMBASE_II_ShiftRegister ,saRoot->FatalForensicShiftOffset);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2625

ossaHwRegWriteExt(agRoot,pcibar ,ErrorTableOffset+MPI_FATAL_EDUMP_TABLE_STATUS, 0 );

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2740

ossaHwRegWriteExt(agRoot, pcibar, ErrorTableOffset + MPI_FATAL_EDUMP_TABLE_STATUS, 0);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2757

ossaHwRegWriteExt(agRoot, 0,V_Scratchpad_Rsvd_0_Register ,0);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2765

ossaHwRegWriteExt(agRoot, pcibar, ErrorTableOffset + MPI_FATAL_EDUMP_TABLE_LO_OFFSET, saRoot->memoryAllocated.agMemory[HDA_DMA_BUFFER].phyAddrLower);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2766

ossaHwRegWriteExt(agRoot, pcibar, ErrorTableOffset + MPI_FATAL_EDUMP_TABLE_HI_OFFSET, saRoot->memoryAllocated.agMemory[HDA_DMA_BUFFER].phyAddrUpper);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2767

ossaHwRegWriteExt(agRoot, pcibar, ErrorTableOffset + MPI_FATAL_EDUMP_TABLE_LENGTH, biggest);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2770

ossaHwRegWriteExt(agRoot, pcibar, ErrorTableOffset + MPI_FATAL_EDUMP_TABLE_STATUS, 0);

sys/dev/pms/RefTisa/sallsdk/spc/saioctlcmd.c

2771

ossaHwRegWriteExt(agRoot, pcibar, ErrorTableOffset + MPI_FATAL_EDUMP_TABLE_ACCUM_LEN, 0);

sys/dev/pms/RefTisa/sallsdk/spc/saphy.c

576

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_DEVICE_LCLK, (value1 & 0xFFFFFFBF) );

sys/dev/pms/RefTisa/sallsdk/spc/saphy.c

645

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_DEVICE_LCLK, value1);

sys/dev/pms/RefTisa/sallsdk/spc/saphy.c

723

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_DEVICE_LCLK, (value2 | DEVICE_LCLK_CLEAR) );

sys/dev/pms/RefTisa/sallsdk/spc/saphy.c

775

ossaHwRegWriteExt(agRoot, PCIBAR2, SPC_REG_DEVICE_LCLK, value2);