sys/arm/arm/debug_monitor.c

496

cr = DBG_REG_BASE_BCR;

sys/arm/arm/debug_monitor.c

557

reg_ctrl = DBG_REG_BASE_BCR;

sys/arm/arm/debug_monitor.c

678

reg_ctrl = DBG_REG_BASE_BCR;

sys/arm/arm/debug_monitor.c

750

reg_ctrl = DBG_REG_BASE_BCR;

sys/arm/arm/debug_monitor.c

923

dbg_wb_write_reg(DBG_REG_BASE_BCR, i, 0);

sys/arm64/arm64/debug_monitor.c

171

SWITCH_CASES_READ_WB_REG(DBG_WB_BCR, DBG_REG_BASE_BCR, val);

sys/arm64/arm64/debug_monitor.c

187

SWITCH_CASES_WRITE_WB_REG(DBG_WB_BCR, DBG_REG_BASE_BCR, val);

sys/arm64/arm64/debug_monitor.c

307

bcr = dbg_wb_read_reg(DBG_REG_BASE_BCR, i);

sys/arm64/arm64/debug_monitor.c

604

dbg_wb_write_reg(DBG_REG_BASE_BCR, i,

sys/arm64/arm64/debug_monitor.c

660

dbg_wb_write_reg(DBG_REG_BASE_BCR, i, 0);

sys/arm64/arm64/debug_monitor.c

683

dbg_wb_write_reg(DBG_REG_BASE_BCR, i, 0);

sys/arm64/arm64/debug_monitor.c

716

dbg_wb_write_reg(DBG_REG_BASE_BCR, i, 0);

sys/arm64/arm64/debug_monitor.c

98

#define DBG_REG_BASE_WVR (DBG_REG_BASE_BCR + 16)