sys/arm/arm/debug_monitor.c

497

vr = DBG_REG_BASE_BVR;

sys/arm/arm/debug_monitor.c

556

reg_addr = DBG_REG_BASE_BVR;

sys/arm/arm/debug_monitor.c

679

reg_addr = DBG_REG_BASE_BVR;

sys/arm/arm/debug_monitor.c

751

reg_addr = DBG_REG_BASE_BVR;

sys/arm/arm/debug_monitor.c

924

dbg_wb_write_reg(DBG_REG_BASE_BVR, i, 0);

sys/arm64/arm64/debug_monitor.c

170

SWITCH_CASES_READ_WB_REG(DBG_WB_BVR, DBG_REG_BASE_BVR, val);

sys/arm64/arm64/debug_monitor.c

186

SWITCH_CASES_WRITE_WB_REG(DBG_WB_BVR, DBG_REG_BASE_BVR, val);

sys/arm64/arm64/debug_monitor.c

309

addr = dbg_wb_read_reg(DBG_REG_BASE_BVR, i);

sys/arm64/arm64/debug_monitor.c

606

dbg_wb_write_reg(DBG_REG_BASE_BVR, i,

sys/arm64/arm64/debug_monitor.c

661

dbg_wb_write_reg(DBG_REG_BASE_BVR, i, 0);

sys/arm64/arm64/debug_monitor.c

684

dbg_wb_write_reg(DBG_REG_BASE_BVR, i, 0);

sys/arm64/arm64/debug_monitor.c

717

dbg_wb_write_reg(DBG_REG_BASE_BVR, i, 0);

sys/arm64/arm64/debug_monitor.c

97

#define DBG_REG_BASE_BCR (DBG_REG_BASE_BVR + 16)