nicvf_queue_reg_write
nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_CFG, qidx, 0);
nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_CFG, qidx, NICVF_SQ_RESET);
nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_CFG2, qidx, 0);
nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_CFG, qidx, 0);
nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_CFG, qidx, NICVF_CQ_RESET);
nicvf_queue_reg_write(nic, NIC_QSET_RBDR_0_1_CFG,
nicvf_queue_reg_write(nic, NIC_QSET_RBDR_0_1_CFG, qidx, 0);
nicvf_queue_reg_write(nic, NIC_QSET_RBDR_0_1_CFG, qidx,
nicvf_queue_reg_write(nic, NIC_QSET_RBDR_0_1_CFG, qidx, 0x00);
nicvf_queue_reg_write(nic, NIC_QSET_RQ_0_7_CFG, qidx, 0);
nicvf_queue_reg_write(nic, NIC_QSET_RQ_GEN_CFG, 0, 0x00);
nicvf_queue_reg_write(nic, NIC_QSET_RQ_0_7_CFG, qidx,
nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_CFG, qidx, NICVF_CQ_RESET);
nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_BASE, qidx,
nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_CFG, qidx, *(uint64_t *)&cq_cfg);
nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_THRESH, qidx, cq->thresh);
nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_CFG2, qidx,
nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_CFG, qidx, NICVF_SQ_RESET);
nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_BASE, qidx,
nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_CFG, qidx, *(uint64_t *)&sq_cfg);
nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_THRESH, qidx, sq->thresh);
nicvf_queue_reg_write(nic, NIC_QSET_RBDR_0_1_BASE, qidx,
nicvf_queue_reg_write(nic, NIC_QSET_RBDR_0_1_CFG, qidx,
nicvf_queue_reg_write(nic, NIC_QSET_RBDR_0_1_DOOR, qidx,
nicvf_queue_reg_write(nic, NIC_QSET_RBDR_0_1_THRESH, qidx,
nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_CFG, qidx, sq_cfg);
nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_DOOR, qidx, 0);
nicvf_queue_reg_write(nic, NIC_QSET_SQ_0_7_CFG, qidx, sq_cfg);
nicvf_queue_reg_write(sq->nic, NIC_QSET_SQ_0_7_DOOR,
nicvf_queue_reg_write(nic, NIC_QSET_RBDR_0_1_DOOR,
nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR, cq_idx, processed_cqe);
void nicvf_queue_reg_write(struct nicvf *, uint64_t, uint64_t, uint64_t);