mtw_write
return (mtw_write(sc, MTW_USB_DMA_CFG, val));
mtw_write(sc, MTW_FCE_PSE_CTRL, 1);
mtw_write(sc, MTW_TX_CPU_FCE_BASE, 0x400230);
mtw_write(sc, MTW_TX_CPU_FCE_MAX_COUNT, 1);
mtw_write(sc, MTW_MCU_FW_IDX, 1);
mtw_write(sc, MTW_FCE_PDMA, 0x44);
mtw_write(sc, MTW_FCE_SKIP_FS, 3);
mtw_write(sc, MTW_FCE_PDMA, 0);
mtw_write(sc, MTW_FCE_PSE_CTRL, 0);
error = mtw_write(sc, reg + i, val);
mtw_write(sc, MTW_EFUSE_CTRL, tmp);
if ((error = mtw_write(sc, MTW_BBP_CSR, tmp)) != 0)
return (mtw_write(sc, MTW_BBP_CSR, tmp));
mtw_write(sc, MTW_BCN_TIME_CFG, tmp);
static int mtw_write(struct mtw_softc *, uint16_t, uint32_t);
error = mtw_write(sc, MTW_EDCA_AC_CFG(aci),
error = mtw_write(sc, MTW_WMM_AIFSN_CFG,
error = mtw_write(sc, MTW_WMM_CWMIN_CFG,
error = mtw_write(sc, MTW_WMM_CWMAX_CFG,
error = mtw_write(sc, MTW_WMM_TXOP0_CFG,
error = mtw_write(sc, MTW_WMM_TXOP1_CFG,
mtw_write(sc, MTW_SKEY_MODE_0_7, attr);
mtw_write(sc, MTW_WCID_ATTR(wcid + 1), attr);
mtw_write(sc, MTW_WCID_ATTR(wcid), attr);
mtw_write(sc, MTW_WCID_ATTR(wcid), attr);
mtw_write(sc, MTW_SKEY_MODE_0_7, attr);
mtw_write(sc, MTW_WCID_ATTR(wcid), attr);
return (mtw_write(sc, MTW_RF_CSR, tmp));
mtw_write(sc, MTW_TX_BAND_CFG, tmp);
if ((error = mtw_write(sc, MTW_RF_CSR, tmp)) != 0)
mtw_write(sc, MTW_TX_ALC_CFG0, tmp);
mtw_write(sc, MTW_CCK_PROT_CFG, tmp);
mtw_write(sc, MTW_OFDM_PROT_CFG, tmp);
mtw_write(sc, MTW_RX_FILTR_CFG, tmp);
error = mtw_write(sc, MTW_BCN_TIME_CFG, tmp);
mtw_write(sc, MTW_LG_FBK_CFG0,
mtw_write(sc, MTW_LG_FBK_CFG1,
mtw_write(sc, MTW_AUTO_RSP_CFG, tmp);
mtw_write(sc, MTW_LEGACY_BASIC_RATE, 0x003);
mtw_write(sc, MTW_LEGACY_BASIC_RATE, 0x150);
mtw_write(sc, MTW_LEGACY_BASIC_RATE, 0x17f);
mtw_write(sc, MTW_MAC_BSSID_DW0,
mtw_write(sc, MTW_MAC_BSSID_DW1, bssid[4] | bssid[5] << 8);
mtw_write(sc, MTW_MAC_ADDR_DW0,
mtw_write(sc, MTW_MAC_ADDR_DW1, addr[4] | addr[5] << 8 | 0xff << 16);
mtw_write(sc, MTW_BKOFF_SLOT_CFG, tmp);
mtw_write(sc, MTW_MAC_SYS_CTRL, MTW_MAC_TX_EN);
mtw_write(sc, MTW_WPDMA_GLO_CFG, tmp);
mtw_write(sc, MTW_USB_DMA_CFG, tmp);
mtw_write(sc, MTW_RX_FILTR_CFG, tmp);
mtw_write(sc, MTW_MAC_SYS_CTRL, MTW_MAC_RX_EN | MTW_MAC_TX_EN);
mtw_write(sc, MTW_MAC_SYS_CTRL, MTW_MAC_RX_EN);
mtw_write(sc, MTW_MAC_SYS_CTRL, 0);
mtw_write(sc, MTW_MAC_SYS_CTRL, tmp);
mtw_write(sc, MTW_RF_BYPASS0, 0);
mtw_write(sc, MTW_RF_SETTING0, 0x10);
mtw_write(sc, MTW_RF_BYPASS0, 0x10);
mtw_write(sc, MTW_RF_BYPASS0, 0);
mtw_write(sc, MTW_RF_SETTING0, rfs);
mtw_write(sc, MTW_RF_BYPASS0, rfb);
mtw_write(sc, MTW_LDO_CFG0, tmp);
mtw_write(sc, MTW_TX_RTS_CFG, tmp);
mtw_write(sc, MTW_WPDMA_GLO_CFG, tmp);
mtw_write(sc, MTW_MAC_SYS_CTRL, MTW_BBP_HRST | MTW_MAC_SRST);
mtw_write(sc, MTW_USB_DMA_CFG, 0);
mtw_write(sc, MTW_MAC_SYS_CTRL, 0);
mtw_write(sc, mt7601_def_mac[i].reg,
mtw_write(sc, 0x1648, 0x00830083);
mtw_write(sc, MTW_FCE_L2_STUFF, tmp);
mtw_write(sc, MTW_WLAN_CTRL, tmp);
mtw_write(sc, MTW_BBP_CSR, 0);
mtw_write(sc, MTW_H2M_MAILBOX, 0);
mtw_write(sc, MTW_US_CYC_CNT, tmp);
mtw_write(sc, MTW_SKEY_MODE_0_7, 0);
mtw_write(sc, MTW_SKEY_MODE_8_15, 0);
mtw_write(sc, MTW_TXOP_CTRL_CFG, 0x0000583f);
mtw_write(sc, MTW_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]);
mtw_write(sc, MTW_TX_PWR_CFG7, 0);
mtw_write(sc, MTW_TX_PWR_CFG9, 0);
mtw_write(sc, MTW_CMB_CTRL, tmp);
mtw_write(sc, MTW_USB_DMA_CFG,
mtw_write(sc, MTW_USB_DMA_CFG, tmp);
mtw_write(sc, MTW_WLAN_CTRL, tmp);
mtw_write(sc, MTW_OSC_CTRL, tmp);
mtw_write(sc, MTW_WPDMA_GLO_CFG, tmp);
mtw_write(sc, MTW_OSC_CTRL, tmp);
mtw_write(sc, MTW_MAC_SYS_CTRL, tmp);
mtw_write(sc, MTW_TX_RTS_CFG, tmp);
mtw_write(sc, MTW_US_CYC_CNT, tmp);
mtw_write(sc, MTW_PBF_CFG, tmp);
mtw_write(sc, MTW_WLAN_CTRL, tmp);
mtw_write(sc, MTW_OSC_CTRL, tmp);