mlx5_fpga_warn
mlx5_fpga_warn(conn->fdev, "RQ buf %p on FPGA QP %u completion status %d\n",
mlx5_fpga_warn(conn->fdev,
mlx5_fpga_warn(conn->fdev, "SQ buf %p on FPGA QP %u completion status %d\n",
mlx5_fpga_warn(conn->fdev, "Unexpected cqe opcode %u\n",
mlx5_fpga_warn(conn->fdev, "CQ event %u on CQ #%u\n", event, mcq->cqn);
mlx5_fpga_warn(conn->fdev, "QP event %u on QP #%u\n", event, mqp->qpn);
mlx5_fpga_warn(conn->fdev, "DMA error on sg 0: %d\n", err);
mlx5_fpga_warn(fdev, "qp_modify RST2INIT failed: %d\n", err);
mlx5_fpga_warn(conn->fdev, "DMA error on sg 1: %d\n", err);
mlx5_fpga_warn(fdev, "qp_modify RST2INIT failed: %d\n", err);
mlx5_fpga_warn(fdev, "qp_modify RST2INIT failed: %d\n", err);
mlx5_fpga_warn(fdev, "qp_modify 2ERR failed: %d\n", err);
mlx5_fpga_warn(fdev, "Error %u: %s\n", syndrome, event_name);
mlx5_fpga_warn(fdev, "Error while loading %u: %s\n",
mlx5_fpga_warn(fdev, "IPSec command send failed with status %u\n",
mlx5_fpga_warn(fdev, "Short receive from FPGA IPSec: %u < %zu bytes\n",
mlx5_fpga_warn(fdev, "Received IPSec offload response without pending command request\n");
mlx5_fpga_warn(fdev, "IPSec SADB command failed with syndrome %08x\n",
mlx5_fpga_warn(fdev, "Failure sending IPSec command: %d\n",
mlx5_fpga_warn(context->dev, "Failure waiting for IPSec command response\n");
mlx5_fpga_warn(fdev, "Unexpected read access_type %u\n",
mlx5_fpga_warn(fdev, "Unexpected write access_type %u\n",
mlx5_fpga_warn(fdev, "No client context found for %s\n", client->name);
mlx5_fpga_warn(fdev, "No client context found for %s\n", client->name);
mlx5_fpga_warn(fdev, "Cannot access %zu bytes at once. Max is %u\n",
mlx5_fpga_warn(fdev, "Cannot access %zu bytes. Must be full dwords\n",
mlx5_fpga_warn(fdev, "Cannot access %zu bytes. Empty transaction not allowed\n",
mlx5_fpga_warn(fdev, "Cannot access %zu bytes at unaligned address %jx\n",
mlx5_fpga_warn(fdev, "Cannot access %zu bytes at address %jx. Crosses page boundary\n",
mlx5_fpga_warn(fdev, "Cannot access %zu bytes at cr-space address %jx. Must access a single dword\n",
mlx5_fpga_warn(conn->fdev, "Transaction must have a completion callback\n");
mlx5_fpga_warn(fdev, "Short message %u bytes from device\n",
mlx5_fpga_warn(fdev, "Wrong answer type %u to a %u transaction\n",
mlx5_fpga_warn(fdev, "Incorrect transaction payload length %zu expected %zu\n",
mlx5_fpga_warn(fdev, "Wrong answer type %u to a %u transaction\n",
mlx5_fpga_warn(fdev, "Unexpected message type %u len %u from device\n",
mlx5_fpga_warn(fdev, "Unexpected transaction ID %u\n", tid);
mlx5_fpga_warn(xfer_state->xfer->conn->fdev, "Transfer failed to start transaction: %d. %u started %u done %u error\n",
mlx5_fpga_warn(complete->conn->fdev, "Transaction failed during transfer. %u started %u inflight %u done %u error\n",
mlx5_fpga_warn(xfer->conn->fdev, "Transfer ends at %jx outside of DDR range %jx\n",
mlx5_fpga_warn(xfer->conn->fdev, "Transfer address %jx not aligned\n",
mlx5_fpga_warn(xfer->conn->fdev, "Transfer size %zu not aligned\n",
mlx5_fpga_warn(xfer->conn->fdev, "Empty transfer size %zu not allowed\n",