m3_wr_assp_data
m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 240);
m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 240);
m3_wr_assp_data(sc, KDATA_ADC1_REQUEST, 1);
m3_wr_assp_data(sc, ch->adc_data + CDATA_INSTANCE_READY, 1);
m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 0);
m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 0);
m3_wr_assp_data(sc, ch->adc_data + CDATA_INSTANCE_READY, 0);
m3_wr_assp_data(sc, KDATA_ADC1_REQUEST, 0);
m3_wr_assp_data(sc, KDATA_BASE_ADDR + i, 0);
m3_wr_assp_data(sc, KDATA_BASE_ADDR2 + i, 0);
m3_wr_assp_data(sc, KDATA_CURRENT_DMA,
m3_wr_assp_data(sc, KDATA_TASK0, 0x400);
m3_wr_assp_data(sc, KDATA_MIXER_TASK_NUMBER, 0);
m3_wr_assp_data(sc, KDATA_DAC_LEFT_VOLUME, M3_DEFAULT_VOL);
m3_wr_assp_data(sc, KDATA_DAC_RIGHT_VOLUME, M3_DEFAULT_VOL);
m3_wr_assp_data(sc, i, 0); /* zero entire dac/adc area */
m3_wr_assp_data(sc, i, sc->savemem[index++]);
m3_wr_assp_data(sc, KDATA_DMA_ACTIVE, 0);
m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_ADDRL, LO(bus_addr));
m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_ADDRH, HI(bus_addr));
m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_END_PLUS_1L,
m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_END_PLUS_1H,
m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTL,
m3_wr_assp_data(sc, ch->dac_data + CDATA_HOST_SRC_CURRENTH,
m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_BEGIN, dsp_in_buf);
m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_END_PLUS_1,
m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_HEAD, dsp_in_buf);
m3_wr_assp_data(sc, ch->dac_data + CDATA_IN_BUF_TAIL, dsp_in_buf);
m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_BEGIN, dsp_out_buf);
m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_END_PLUS_1,
m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_HEAD, dsp_out_buf);
m3_wr_assp_data(sc, ch->dac_data + CDATA_OUT_BUF_TAIL, dsp_out_buf);
m3_wr_assp_data(sc, ch->dac_data + SRC3_DIRECTION_OFFSET + 12,
m3_wr_assp_data(sc, ch->dac_data + SRC3_DIRECTION_OFFSET + 19,
m3_wr_assp_data(sc, ch->dac_data + SRC3_DIRECTION_OFFSET + 22, 0);
m3_wr_assp_data(sc, ch->dac_data + CDATA_DMA_CONTROL,
m3_wr_assp_data(sc, ch->dac_data + pv[i].addr, pv[i].val);
m3_wr_assp_data(sc, KDATA_INSTANCE0_MINISRC +
m3_wr_assp_data(sc, KDATA_DMA_XFER0 + (sc->pch_cnt + sc->rch_cnt),
m3_wr_assp_data(sc, KDATA_MIXER_XFER0 + sc->pch_cnt,
m3_wr_assp_data(sc, KDATA_INSTANCE0_MINISRC +
m3_wr_assp_data(sc, KDATA_DMA_XFER0 +
m3_wr_assp_data(sc, KDATA_MIXER_XFER0 + (sc->pch_cnt-1), 0);
m3_wr_assp_data(sc, ch->dac_data + SRC3_MODE_OFFSET, data);
m3_wr_assp_data(sc, ch->dac_data + SRC3_WORD_LENGTH_OFFSET, data);
m3_wr_assp_data(sc, ch->dac_data + CDATA_FREQUENCY, freq);
m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 240);
m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 240);
m3_wr_assp_data(sc, ch->dac_data + CDATA_INSTANCE_READY, 1);
m3_wr_assp_data(sc, KDATA_MIXER_TASK_NUMBER,
m3_wr_assp_data(sc, KDATA_TIMER_COUNT_RELOAD, 0);
m3_wr_assp_data(sc, KDATA_TIMER_COUNT_CURRENT, 0);
m3_wr_assp_data(sc, ch->dac_data + CDATA_INSTANCE_READY, 0);
m3_wr_assp_data(sc, KDATA_MIXER_TASK_NUMBER,
m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_ADDRL, LO(bus_addr));
m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_ADDRH, HI(bus_addr));
m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_END_PLUS_1L,
m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_END_PLUS_1H,
m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTL,
m3_wr_assp_data(sc, ch->adc_data + CDATA_HOST_SRC_CURRENTH,
m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_BEGIN, dsp_in_buf);
m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_END_PLUS_1,
m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_HEAD, dsp_in_buf);
m3_wr_assp_data(sc, ch->adc_data + CDATA_IN_BUF_TAIL, dsp_in_buf);
m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_BEGIN, dsp_out_buf);
m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_END_PLUS_1,
m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_HEAD, dsp_out_buf);
m3_wr_assp_data(sc, ch->adc_data + CDATA_OUT_BUF_TAIL, dsp_out_buf);
m3_wr_assp_data(sc, ch->adc_data + SRC3_DIRECTION_OFFSET + 12,
m3_wr_assp_data(sc, ch->adc_data + CDATA_DMA_CONTROL,
m3_wr_assp_data(sc, ch->adc_data + rv[i].addr, rv[i].val);
m3_wr_assp_data(sc, KDATA_INSTANCE0_MINISRC +
m3_wr_assp_data(sc, KDATA_DMA_XFER0 + (sc->pch_cnt + sc->rch_cnt),
m3_wr_assp_data(sc, KDATA_ADC1_XFER0 + sc->rch_cnt,
m3_wr_assp_data(sc, KDATA_INSTANCE0_MINISRC +
m3_wr_assp_data(sc, KDATA_DMA_XFER0 +
m3_wr_assp_data(sc, KDATA_ADC1_XFER0 + (sc->rch_cnt - 1), 0);
m3_wr_assp_data(sc, ch->adc_data + SRC3_MODE_OFFSET, data);
m3_wr_assp_data(sc, ch->adc_data + SRC3_WORD_LENGTH_OFFSET, data);
m3_wr_assp_data(sc, ch->adc_data + CDATA_FREQUENCY, freq);