sys/dev/alc/if_alc.c

1159

linkcfg = CSR_READ_2(sc, sc->alc_expcap +

sys/dev/alc/if_alc.c

1298

cap = CSR_READ_2(sc, sc->alc_expcap + PCIER_LINK_CAP);

sys/dev/alc/if_alc.c

1300

ctl = CSR_READ_2(sc, sc->alc_expcap + PCIER_LINK_CTL);

sys/dev/alc/if_alc.c

1499

burst = CSR_READ_2(sc, base + PCIER_DEVICE_CTL);

sys/dev/alc/if_alc.c

3434

prod = CSR_READ_2(sc, ALC_MBOX_TD_PRI0_CONS_IDX);

sys/dev/alc/if_alc.c

908

CSR_READ_2(sc, ALC_GPHY_CFG);

sys/dev/alc/if_alc.c

913

CSR_READ_2(sc, ALC_GPHY_CFG);

sys/dev/ale/if_ale.c

2286

prod = CSR_READ_2(sc, ALE_TPD_CONS_IDX);

sys/dev/bwi/bwimac.c

174

return CSR_READ_2(sc, data_reg);

sys/dev/bwi/bwimac.c

188

ret = CSR_READ_2(sc, BWI_MOBJ_DATA_UNALIGN);

sys/dev/bwi/bwimac.c

193

ret |= CSR_READ_2(sc, BWI_MOBJ_DATA);

sys/dev/bwi/bwimac.c

1947

CSR_READ_2(sc, BWI_PHYINFO); /* dummy read */

sys/dev/bwi/bwimac.c

735

if (CSR_READ_2(sc, 0x50e) & 0x80)

sys/dev/bwi/bwimac.c

740

if (CSR_READ_2(sc, 0x50e) & 0x400)

sys/dev/bwi/bwimac.c

745

if ((CSR_READ_2(sc, 0x690) & 0x100) == 0)

sys/dev/bwi/bwiphy.c

149

return CSR_READ_2(sc, BWI_PHY_DATA);

sys/dev/bwi/bwiphy.c

162

val = CSR_READ_2(sc, BWI_PHYINFO);

sys/dev/bwi/bwirf.c

1281

ant_div = CSR_READ_2(sc, BWI_RF_ANTDIV);

sys/dev/bwi/bwirf.c

1283

chan_ex = CSR_READ_2(sc, BWI_RF_CHAN_EX);

sys/dev/bwi/bwirf.c

1662

ant_div = CSR_READ_2(sc, BWI_RF_ANTDIV);

sys/dev/bwi/bwirf.c

1663

CSR_READ_2(sc, BWI_BBP_ATTEN);

sys/dev/bwi/bwirf.c

1664

chan_ex = CSR_READ_2(sc, BWI_RF_CHAN_EX);

sys/dev/bwi/bwirf.c

1940

ant_div = CSR_READ_2(sc, BWI_RF_ANTDIV);

sys/dev/bwi/bwirf.c

1948

bbp_atten = CSR_READ_2(sc, BWI_BBP_ATTEN);

sys/dev/bwi/bwirf.c

1949

chan_ex = CSR_READ_2(sc, BWI_RF_CHAN_EX);

sys/dev/bwi/bwirf.c

221

return CSR_READ_2(sc, BWI_RF_DATA_LO);

sys/dev/bwi/bwirf.c

252

val = CSR_READ_2(sc, BWI_RF_DATA_HI);

sys/dev/bwi/bwirf.c

256

val |= CSR_READ_2(sc, BWI_RF_DATA_LO);

sys/dev/bwi/bwirf.c

2599

bphy_ctrl = CSR_READ_2(sc, BWI_BPHY_CTRL);

sys/dev/bwi/bwirf.c

783

bphy_ctrl = CSR_READ_2(sc, BWI_BPHY_CTRL);

sys/dev/bwi/bwirf.c

820

bbp_atten = CSR_READ_2(sc, BWI_BBP_ATTEN);

sys/dev/bwi/bwirf.c

821

rf_chan_ex = CSR_READ_2(sc, BWI_RF_CHAN_EX);

sys/dev/bwi/if_bwi.c

321

return CSR_READ_2(sc, ofs + BWI_SPROM_START);

sys/dev/bwi/if_bwi.c

3865

val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);

sys/dev/bwi/if_bwi.c

3950

val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);

sys/dev/bwi/if_bwi.c

3971

val = CSR_READ_2(sc, BWI_MAC_GPIO_CTRL);

sys/dev/bwi/if_bwivar.h

89

CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) | (bits))

sys/dev/bwi/if_bwivar.h

94

CSR_WRITE_2((sc), (reg), (CSR_READ_2((sc), (reg)) & (filt)) | (bits))

sys/dev/bwi/if_bwivar.h

99

CSR_WRITE_2((sc), (reg), CSR_READ_2((sc), (reg)) & ~(bits))

sys/dev/fxp/if_fxp.c

1164

reg = CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO;

sys/dev/fxp/if_fxp.c

1179

if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO)

sys/dev/fxp/if_fxp.c

1218

if (CSR_READ_2(sc, FXP_CSR_EEPROMCONTROL) & FXP_EEPROM_EEDO)

sys/dev/msk/if_msk.c

1359

status = CSR_READ_2(sc, B28_Y2_ASF_HCU_CCSR);

sys/dev/msk/if_msk.c

3560

if (sc->msk_stat_cons == CSR_READ_2(sc, STAT_PUT_IDX))

sys/dev/msk/if_msk.c

3648

return (sc->msk_stat_cons != CSR_READ_2(sc, STAT_PUT_IDX));

sys/dev/msk/if_msk.c

656

idx = CSR_READ_2(sc_if->msk_softc,

sys/dev/msk/if_mskreg.h

2155

CSR_READ_2((sc_if)->msk_softc, (reg))

sys/dev/msk/if_mskreg.h

2171

CSR_READ_2((sc), GMAC_REG((port), (reg)))

sys/dev/my/if_my.c

226

data = CSR_READ_2(sc, MY_PHYBASE + reg * 2);

sys/dev/re/if_re.c

2537

status = CSR_READ_2(sc, RL_ISR);

sys/dev/re/if_re.c

2567

status = CSR_READ_2(sc, RL_ISR);

sys/dev/re/if_re.c

2590

status = CSR_READ_2(sc, RL_ISR);

sys/dev/re/if_re.c

2639

if ((CSR_READ_2(sc, RL_ISR) & RL_INTRS_CPLUS) || rval) {

sys/dev/re/if_re.c

2672

status = CSR_READ_2(sc, RL_ISR);

sys/dev/re/if_re.c

564

rval = CSR_READ_2(sc, re8139_reg);

sys/dev/re/if_re.c

852

status = CSR_READ_2(sc, RL_ISR);

sys/dev/rl/if_rl.c

1123

cur_rx = (CSR_READ_2(sc, RL_CURRXADDR) + 16) % RL_RXBUFLEN;

sys/dev/rl/if_rl.c

1126

limit = CSR_READ_2(sc, RL_CURRXBUF) % RL_RXBUFLEN;

sys/dev/rl/if_rl.c

1315

if (CSR_READ_2(sc, RL_CSCFG) & RL_CSCFG_LINK_OK) {

sys/dev/rl/if_rl.c

1331

linktest = CSR_READ_2(sc, RL_CSCFG) & RL_CSCFG_STATUS;

sys/dev/rl/if_rl.c

1360

linktest = CSR_READ_2(sc, RL_CSCFG) & RL_CSCFG_STATUS;

sys/dev/rl/if_rl.c

1458

status = CSR_READ_2(sc, RL_ISR);

sys/dev/rl/if_rl.c

1495

status = CSR_READ_2(sc, RL_ISR);

sys/dev/rl/if_rl.c

1516

status = CSR_READ_2(sc, RL_ISR);

sys/dev/rl/if_rl.c

427

return (CSR_READ_2(sc, rl8139_reg));

sys/dev/rl/if_rlreg.h

971

CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) | (val))

sys/dev/rl/if_rlreg.h

974

CSR_WRITE_2(sc, offset, CSR_READ_2(sc, offset) & ~(val))

sys/dev/sge/if_sge.c

462

rxfilt = CSR_READ_2(sc, RxMacControl);

sys/dev/sge/if_sge.c

495

rxfilt = CSR_READ_2(sc, RxMacControl);

sys/dev/sis/if_sis.c

424

((uint16_t *)dest)[0] = CSR_READ_2(sc, SIS_RXFILT_DATA);

sys/dev/sis/if_sis.c

426

((uint16_t *)dest)[1] = CSR_READ_2(sc, SIS_RXFILT_DATA);

sys/dev/sis/if_sis.c

428

((uint16_t *)dest)[2] = CSR_READ_2(sc, SIS_RXFILT_DATA);

sys/dev/sk/if_sk.c

378

return(CSR_READ_2(sc, SK_WIN_BASE + SK_REG(reg)));

sys/dev/sk/if_sk.c

380

return(CSR_READ_2(sc, reg));

sys/dev/ste/if_ste.c

1639

val = CSR_READ_2(sc, STE_MACCTL1);

sys/dev/ste/if_ste.c

1645

if ((CSR_READ_2(sc, STE_MACCTL1) & (STE_MACCTL1_TX_DISABLE |

sys/dev/ste/if_ste.c

1652

CSR_READ_2(sc, STE_ISR_ACK);

sys/dev/ste/if_ste.c

1717

mac = CSR_READ_2(sc, STE_MACCTL1);

sys/dev/ste/if_ste.c

1720

mac = CSR_READ_2(sc, STE_MACCTL1);

sys/dev/ste/if_ste.c

189

CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x))

sys/dev/ste/if_ste.c

192

CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))

sys/dev/ste/if_ste.c

281

cfg = CSR_READ_2(sc, STE_MACCTL0);

sys/dev/ste/if_ste.c

366

if (CSR_READ_2(sc, STE_EEPROM_CTL) & STE_EECTL_BUSY)

sys/dev/ste/if_ste.c

397

*dest = le16toh(CSR_READ_2(sc, STE_EEPROM_DATA));

sys/dev/ste/if_ste.c

489

status = CSR_READ_2(sc, STE_ISR_ACK);

sys/dev/ste/if_ste.c

521

status = CSR_READ_2(sc, STE_ISR_ACK);

sys/dev/ste/if_ste.c

687

txstat = CSR_READ_2(sc, STE_TX_STATUS);

sys/dev/ste/if_ste.c

811

CSR_READ_2(sc, STE_STAT_RX_OCTETS_LO);

sys/dev/ste/if_ste.c

812

CSR_READ_2(sc, STE_STAT_RX_OCTETS_HI);

sys/dev/ste/if_ste.c

813

CSR_READ_2(sc, STE_STAT_RX_FRAMES);

sys/dev/ste/if_ste.c

818

CSR_READ_2(sc, STE_STAT_TX_OCTETS_LO);

sys/dev/ste/if_ste.c

819

CSR_READ_2(sc, STE_STAT_TX_OCTETS_HI);

sys/dev/ste/if_ste.c

820

CSR_READ_2(sc, STE_STAT_TX_FRAMES);

sys/dev/ste/if_ste.c

844

val = (uint32_t)CSR_READ_2(sc, STE_STAT_RX_OCTETS_LO) |

sys/dev/ste/if_ste.c

845

((uint32_t)CSR_READ_2(sc, STE_STAT_RX_OCTETS_HI)) << 16;

sys/dev/ste/if_ste.c

848

stats->rx_frames += CSR_READ_2(sc, STE_STAT_RX_FRAMES);

sys/dev/ste/if_ste.c

853

val = (uint32_t)CSR_READ_2(sc, STE_STAT_TX_OCTETS_LO) |

sys/dev/ste/if_ste.c

854

((uint32_t)CSR_READ_2(sc, STE_STAT_TX_OCTETS_HI)) << 16;

sys/dev/ste/if_ste.c

857

stats->tx_frames += CSR_READ_2(sc, STE_STAT_TX_FRAMES);

sys/dev/stge/if_stge.c

1457

status = CSR_READ_2(sc, STGE_IntStatus);

sys/dev/stge/if_stge.c

1463

status = CSR_READ_2(sc, STGE_IntStatusAck);

sys/dev/stge/if_stge.c

1788

status = CSR_READ_2(sc, STGE_IntStatus);

sys/dev/stge/if_stge.c

1867

if_inc_counter(ifp, IFCOUNTER_IERRORS, CSR_READ_2(sc, STGE_FramesLostRxErrors));

sys/dev/stge/if_stge.c

1879

CSR_READ_2(sc, STGE_FramesAbortXSColls) +

sys/dev/stge/if_stge.c

1880

CSR_READ_2(sc, STGE_FramesWEXDeferal));

sys/dev/stge/if_stge.c

2123

CSR_READ_2(sc, STGE_DebugCtrl) | 0x0200);

sys/dev/stge/if_stge.c

2127

CSR_READ_2(sc, STGE_DebugCtrl) | 0x0010);

sys/dev/stge/if_stge.c

2130

CSR_READ_2(sc, STGE_DebugCtrl) | 0x0020);

sys/dev/stge/if_stge.c

2483

mode = CSR_READ_2(sc, STGE_ReceiveMode);

sys/dev/stge/if_stge.c

2523

mode = CSR_READ_2(sc, STGE_ReceiveMode);

sys/dev/stge/if_stge.c

381

if ((CSR_READ_2(sc, STGE_EepromCtrl) & EC_EepromBusy) == 0)

sys/dev/stge/if_stge.c

403

*data = CSR_READ_2(sc, STGE_EepromData);

sys/dev/stge/if_stge.c

541

v = CSR_READ_2(sc, STGE_StationAddress0);

sys/dev/stge/if_stge.c

544

v = CSR_READ_2(sc, STGE_StationAddress1);

sys/dev/stge/if_stge.c

547

v = CSR_READ_2(sc, STGE_StationAddress2);

sys/dev/vge/if_vge.c

269

word = CSR_READ_2(sc, VGE_EERDDAT);

sys/dev/vge/if_vge.c

384

rval = CSR_READ_2(sc, VGE_MIIDATA);

sys/dev/vge/if_vgevar.h

233

CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x))

sys/dev/vge/if_vgevar.h

240

CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))

sys/dev/vr/if_vr.c

1608

status = CSR_READ_2(sc, VR_ISR);

sys/dev/vr/if_vr.c

1669

status = CSR_READ_2(sc, VR_ISR);

sys/dev/vr/if_vr.c

1695

status = CSR_READ_2(sc, VR_ISR);

sys/dev/vr/if_vr.c

1733

status = CSR_READ_2(sc, VR_ISR);

sys/dev/vr/if_vr.c

259

return (CSR_READ_2(sc, VR_MIIDATA));

sys/dev/vr/if_vrreg.h

759

#define VR_SETBIT16(sc, reg, x) CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) | (x))

sys/dev/vr/if_vrreg.h

760

#define VR_CLRBIT16(sc, reg, x) CSR_WRITE_2(sc, reg, CSR_READ_2(sc, reg) & ~(x))

sys/dev/vte/if_vte.c

1226

mcr = CSR_READ_2(sc, VTE_MCR0);

sys/dev/vte/if_vte.c

1251

CSR_READ_2(sc, VTE_CNT_RX_DONE);

sys/dev/vte/if_vte.c

1252

CSR_READ_2(sc, VTE_CNT_MECNT0);

sys/dev/vte/if_vte.c

1253

CSR_READ_2(sc, VTE_CNT_MECNT1);

sys/dev/vte/if_vte.c

1254

CSR_READ_2(sc, VTE_CNT_MECNT2);

sys/dev/vte/if_vte.c

1255

CSR_READ_2(sc, VTE_CNT_MECNT3);

sys/dev/vte/if_vte.c

1256

CSR_READ_2(sc, VTE_CNT_TX_DONE);

sys/dev/vte/if_vte.c

1257

CSR_READ_2(sc, VTE_CNT_MECNT4);

sys/dev/vte/if_vte.c

1258

CSR_READ_2(sc, VTE_CNT_PAUSE);

sys/dev/vte/if_vte.c

1271

CSR_READ_2(sc, VTE_MECISR);

sys/dev/vte/if_vte.c

1273

stat->rx_frames += CSR_READ_2(sc, VTE_CNT_RX_DONE);

sys/dev/vte/if_vte.c

1274

value = CSR_READ_2(sc, VTE_CNT_MECNT0);

sys/dev/vte/if_vte.c

1277

value = CSR_READ_2(sc, VTE_CNT_MECNT1);

sys/dev/vte/if_vte.c

1280

value = CSR_READ_2(sc, VTE_CNT_MECNT2);

sys/dev/vte/if_vte.c

1282

value = CSR_READ_2(sc, VTE_CNT_MECNT3);

sys/dev/vte/if_vte.c

1287

stat->tx_frames += CSR_READ_2(sc, VTE_CNT_TX_DONE);

sys/dev/vte/if_vte.c

1288

value = CSR_READ_2(sc, VTE_CNT_MECNT4);

sys/dev/vte/if_vte.c

1292

value = CSR_READ_2(sc, VTE_CNT_PAUSE);

sys/dev/vte/if_vte.c

1336

status = CSR_READ_2(sc, VTE_MISR);

sys/dev/vte/if_vte.c

1358

status = CSR_READ_2(sc, VTE_MISR);

sys/dev/vte/if_vte.c

1595

mdcsc = CSR_READ_2(sc, VTE_MDCSC);

sys/dev/vte/if_vte.c

1596

mcr = CSR_READ_2(sc, VTE_MCR1);

sys/dev/vte/if_vte.c

1600

if ((CSR_READ_2(sc, VTE_MCR1) & MCR1_MAC_RESET) == 0)

sys/dev/vte/if_vte.c

1781

CSR_READ_2(sc, VTE_MISR);

sys/dev/vte/if_vte.c

179

if ((CSR_READ_2(sc, VTE_MMDIO) & MMDIO_READ) == 0)

sys/dev/vte/if_vte.c

1827

mcr = CSR_READ_2(sc, VTE_MCR0);

sys/dev/vte/if_vte.c

1833

mcr = CSR_READ_2(sc, VTE_MCR0);

sys/dev/vte/if_vte.c

1854

mcr = CSR_READ_2(sc, VTE_MCR0);

sys/dev/vte/if_vte.c

1859

mcr = CSR_READ_2(sc, VTE_MCR0);

sys/dev/vte/if_vte.c

188

return (CSR_READ_2(sc, VTE_MMRD));

sys/dev/vte/if_vte.c

2005

mcr = CSR_READ_2(sc, VTE_MCR0);

sys/dev/vte/if_vte.c

204

if ((CSR_READ_2(sc, VTE_MMDIO) & MMDIO_WRITE) == 0)

sys/dev/vte/if_vte.c

2043

CSR_READ_2(sc, VTE_MCR0);

sys/dev/vte/if_vte.c

360

mid = CSR_READ_2(sc, VTE_MID0L);

sys/dev/vte/if_vte.c

363

mid = CSR_READ_2(sc, VTE_MID0M);

sys/dev/vte/if_vte.c

366

mid = CSR_READ_2(sc, VTE_MID0H);

sys/dev/vte/if_vte.c

409

CSR_READ_2(sc, VTE_MACID));

sys/dev/vte/if_vte.c

410

macid = CSR_READ_2(sc, VTE_MACID_REV);

sys/dev/xl/if_xl.c

1357

sc->xl_media = CSR_READ_2(sc, XL_W3_MEDIA_OPT);

sys/dev/xl/if_xl.c

2150

status = CSR_READ_2(sc, XL_STATUS);

sys/dev/xl/if_xl.c

2237

status = CSR_READ_2(sc, XL_STATUS);

sys/dev/xl/if_xl.c

2695

CSR_READ_2(sc, XL_W7_BM_PME);

sys/dev/xl/if_xl.c

2924

status = CSR_READ_2(sc, XL_W4_MEDIA_STATUS);

sys/dev/xl/if_xl.c

3113

status = CSR_READ_2(sc, XL_W4_MEDIA_STATUS);

sys/dev/xl/if_xl.c

3265

CSR_READ_2(sc, XL_W7_BM_PME);

sys/dev/xl/if_xl.c

358

if ((CSR_READ_2(sc, XL_STATUS) & XL_STAT_CMDBUSY) == 0)

sys/dev/xl/if_xl.c

388

val = CSR_READ_2(sc, XL_W4_PHY_MGMT);

sys/dev/xl/if_xl.c

530

if (CSR_READ_2(sc, XL_W0_EE_CMD) & XL_EE_BUSY)

sys/dev/xl/if_xl.c

579

word = CSR_READ_2(sc, XL_W0_EE_DATA);

sys/dev/xl/if_xl.c

746

mediastat = CSR_READ_2(sc, XL_W4_MEDIA_STATUS);

sys/dev/xl/if_xl.c

856

if (!(CSR_READ_2(sc, XL_STATUS) & XL_STAT_CMDBUSY))

sys/dev/xl/if_xl.c

880

CSR_READ_2(sc, XL_W2_RESET_OPTIONS) |