ip17x_writephy
err = ip17x_writephy(sc->sc_dev, 29, 19, reg[0]);
err = ip17x_writephy(sc->sc_dev, 29, 20, reg[1]);
if (ip17x_writephy(sc->sc_dev, 29, 23, data))
if (ip17x_writephy(sc->sc_dev, 30, i, data))
if (ip17x_writephy(sc->sc_dev, 29, 30, sc->pvid[i]))
if (ip17x_writephy(sc->sc_dev, 29, 24 + i, sc->pvid[i]))
if (ip17x_writephy(sc->sc_dev, IP175C_RESET_PHY, IP175C_RESET_REG,
if (ip17x_writephy(sc->sc_dev, IP175C_MODE_PHY, IP175C_MODE_REG,
ip17x_writephy(sc->sc_dev, 22, 14 + i, i + 1);
ip17x_writephy(sc->sc_dev, 22, 14 + i,
ip17x_writephy(sc->sc_dev, 23, i,
ip17x_writephy(sc->sc_dev, 23, i + 8,
ip17x_writephy(sc->sc_dev, 23, i + 16,
ip17x_writephy(sc->sc_dev, 22, 10, vlan_mask);
ip17x_writephy(sc->sc_dev, 22, 4 + i, sc->pvid[i]);
ip17x_writephy(sc->sc_dev, IP175D_RESET_PHY, IP175D_RESET_REG, 0x175d);
ip17x_writephy(sc->sc_dev, 22, 3, 0x8100);
DEVMETHOD(miibus_writereg, ip17x_writephy),
DEVMETHOD(mdio_writereg, ip17x_writephy),
DEVMETHOD(etherswitch_writephyreg, ip17x_writephy),
return (ip17x_writephy(dev, phy, reg, val));
int ip17x_writephy(device_t, int, int, int);