ioremap
mbox->reg.bar_reg = ioremap(bar_reg, mbox->reg.len);
ucreg->bar_reg = ioremap(ucreg->bar_base, ucreg->len);
dpi->dbr = ioremap(umaddr, PAGE_SIZE);
priv->catas_err.map = ioremap(addr, priv->fw.catas_size * 4);
ioremap(pci_resource_start(dev->persist->pdev,
ioremap(pci_resource_start(dev->persist->pdev, 2) +
priv->cmd.hcr = ioremap(pci_resource_start(dev->persist->pdev,
priv->clr_base = ioremap(pci_resource_start(dev->persist->pdev,
ioremap(pci_resource_start(dev->persist->pdev, 2) +
ioremap(pci_resource_start(dev->persist->pdev,
priv->kar = ioremap((phys_addr_t) priv->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
owner = ioremap(pci_resource_start(dev->persist->pdev, 0) +
owner = ioremap(pci_resource_start(dev->persist->pdev, 0) +
uar->map = ioremap(uar->pfn << PAGE_SHIFT, PAGE_SIZE);
reset = ioremap(pci_resource_start(dev->persist->pdev, 0) +
mdev->uar_map = ioremap((phys_addr_t) mdev->priv_uar.pfn << PAGE_SHIFT,
ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
dev->iseg = ioremap(dev->iseg_base, sizeof(*dev->iseg));
up->map = ioremap(pfn << PAGE_SHIFT, PAGE_SIZE);
dev->av_table.av_map = ioremap(pci_resource_start(dev->pdev, 4) +
dev->catas_err.map = ioremap(addr, dev->catas_err.size * 4);
dev->hcr = ioremap(pci_resource_start(dev->pdev, 0) + MTHCA_HCR_BASE,
dev->cmd.dbell_map = ioremap(addr, max_off + sizeof(u32));
*map = ioremap(base + offset, size);
dev->kar = ioremap((phys_addr_t) dev->driver_uar.pfn << PAGE_SHIFT, PAGE_SIZE);
ioremap(addr, mpts * sizeof(struct mthca_mpt_entry));
ioremap(addr, mtts * dev->limits.mtt_seg_size);
void __iomem *reset = ioremap(pci_resource_start(mdev->pdev, 0) +