intsrc
uint32_t intsrc, sctrl;
intsrc = es_rd(es, ES1370_REG_STATUS, 4);
if ((intsrc & STAT_INTR) == 0) {
if (intsrc & STAT_ADC)
if (intsrc & STAT_DAC1)
if (intsrc & STAT_DAC2)
if (intsrc & STAT_ADC)
if (intsrc & STAT_DAC1)
if (intsrc & STAT_DAC2)
u_int32_t intsrc = fm801_rd(fm801, FM_INTSTATUS, 2);
DPRINT("\nfm801_intr intsrc 0x%x ", intsrc);
if(intsrc & FM_INTSTATUS_PLAY) {
if(intsrc & FM_INTSTATUS_REC) {
if ( intsrc & FM_INTSTATUS_MPU ) {
fm801_wr(fm801, FM_INTSTATUS, intsrc & FM_INTSTATUS_MPU,2);
if ( intsrc & FM_INTSTATUS_VOL ) {
fm801_wr(fm801, FM_INTSTATUS, intsrc & FM_INTSTATUS_VOL,2);
fm801_wr(fm801, FM_INTSTATUS, intsrc & (FM_INTSTATUS_PLAY | FM_INTSTATUS_REC), 2);
u_int32_t active, mask, bufhalf, chnum, intsrc;
intsrc = tr_rd(tr, TR_REG_MISCINT, 4);
if (intsrc & TR_INT_ADDR) {
if (intsrc & TR_INT_SB) {
int intr_add_handler(struct intsrc *isrc, const char *name,
int intr_config_intr(struct intsrc *isrc, enum intr_trigger trig,
int intr_describe(struct intsrc *isrc, void *ih, const char *descr);
void intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame);
struct intsrc *intr_lookup_source(int vector);
int intr_register_source(struct intsrc *isrc);
struct intsrc;
void (*pic_enable_source)(struct intsrc *);
void (*pic_disable_source)(struct intsrc *, int);
void (*pic_eoi_source)(struct intsrc *);
void (*pic_enable_intr)(struct intsrc *);
void (*pic_disable_intr)(struct intsrc *);
int (*pic_vector)(struct intsrc *);
int (*pic_source_pending)(struct intsrc *);
int (*pic_config_intr)(struct intsrc *, enum intr_trigger,
int (*pic_assign_cpu)(struct intsrc *, u_int apic_id);
void (*pic_reprogram_pin)(struct intsrc *);
struct intsrc intsrc; /* @TOP -> *xen_arch_isrc */
intr_execute_handlers(&isrc->xi_arch.intsrc, frame);
return (intr_add_handler(&isrc->xi_arch.intsrc, name, filter, handler,
return (intr_describe(&isrc->xi_arch.intsrc, cookie, descr));
return (intr_event_bind(isrc->xi_arch.intsrc.is_event, cpu));
struct intsrc at_intsrc;
static void atpic_enable_source(struct intsrc *isrc);
static void atpic_disable_source(struct intsrc *isrc, int eoi);
static void atpic_eoi_master(struct intsrc *isrc);
static void atpic_eoi_slave(struct intsrc *isrc);
static void atpic_enable_intr(struct intsrc *isrc);
static void atpic_disable_intr(struct intsrc *isrc);
static int atpic_vector(struct intsrc *isrc);
static int atpic_source_pending(struct intsrc *isrc);
static int atpic_config_intr(struct intsrc *isrc, enum intr_trigger trig,
static int atpic_assign_cpu(struct intsrc *isrc, u_int apic_id);
_atpic_eoi_master(struct intsrc *isrc)
_atpic_eoi_slave(struct intsrc *isrc)
atpic_enable_source(struct intsrc *isrc)
atpic_disable_source(struct intsrc *isrc, int eoi)
atpic_eoi_master(struct intsrc *isrc)
atpic_eoi_slave(struct intsrc *isrc)
atpic_enable_intr(struct intsrc *isrc)
atpic_disable_intr(struct intsrc *isrc)
atpic_vector(struct intsrc *isrc)
atpic_source_pending(struct intsrc *isrc)
atpic_config_intr(struct intsrc *isrc, enum intr_trigger trig,
atpic_assign_cpu(struct intsrc *isrc, u_int apic_id)
atpic_enable_source((struct intsrc *)&atintrs[ICU_SLAVEID]);
struct intsrc *isrc;
static struct intsrc *i8254_intsrc;
static int (*i8254_pending)(struct intsrc *);
static void intrcnt_updatename(struct intsrc *is);
static void intrcnt_register(struct intsrc *is);
intr_register_source(struct intsrc *isrc)
struct intsrc *is;
struct intsrc *
intr_add_handler(struct intsrc *isrc, const char *name, driver_filter_t filter,
struct intsrc *isrc;
intr_config_intr(struct intsrc *isrc, enum intr_trigger trig,
struct intsrc *isrc;
intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame)
struct intsrc *is;
struct intsrc *isrc;
intrcnt_updatename(struct intsrc *is)
intrcnt_register(struct intsrc *is)
intr_describe(struct intsrc *isrc, void *ih, const char *descr)
struct intsrc *is;
struct intsrc **isrc;
struct intsrc *isrc;
const struct intsrc *i1, *i2;
i1 = *(const struct intsrc * const *)one;
i2 = *(const struct intsrc * const *)two;
struct intsrc *isrc;
static struct intsrc **interrupt_sources;
static struct intsrc **interrupt_sorted;
static void ioapic_enable_source(struct intsrc *isrc);
static void ioapic_disable_source(struct intsrc *isrc, int eoi);
static void ioapic_eoi_source(struct intsrc *isrc);
static void ioapic_enable_intr(struct intsrc *isrc);
static void ioapic_disable_intr(struct intsrc *isrc);
static int ioapic_vector(struct intsrc *isrc);
static int ioapic_source_pending(struct intsrc *isrc);
static int ioapic_config_intr(struct intsrc *isrc, enum intr_trigger trig,
static int ioapic_assign_cpu(struct intsrc *isrc, u_int apic_id);
static void ioapic_reprogram_intpin(struct intsrc *isrc);
_ioapic_eoi_source(struct intsrc *isrc, int locked)
ioapic_enable_source(struct intsrc *isrc)
ioapic_disable_source(struct intsrc *isrc, int eoi)
ioapic_eoi_source(struct intsrc *isrc)
ioapic_reprogram_intpin(struct intsrc *isrc)
ioapic_assign_cpu(struct intsrc *isrc, u_int apic_id)
ioapic_enable_intr(struct intsrc *isrc)
ioapic_disable_intr(struct intsrc *isrc)
ioapic_vector(struct intsrc *isrc)
ioapic_source_pending(struct intsrc *isrc)
ioapic_config_intr(struct intsrc *isrc, enum intr_trigger trig,
struct intsrc io_intsrc;
struct intsrc *isrc;
struct intsrc *isrc;
struct intsrc msi_intsrc;
static void msi_enable_source(struct intsrc *isrc);
static void msi_disable_source(struct intsrc *isrc, int eoi);
static void msi_eoi_source(struct intsrc *isrc);
static void msi_enable_intr(struct intsrc *isrc);
static void msi_disable_intr(struct intsrc *isrc);
static int msi_vector(struct intsrc *isrc);
static int msi_source_pending(struct intsrc *isrc);
static int msi_config_intr(struct intsrc *isrc, enum intr_trigger trig,
static int msi_assign_cpu(struct intsrc *isrc, u_int apic_id);
msi_enable_source(struct intsrc *isrc)
msi_disable_source(struct intsrc *isrc, int eoi)
msi_eoi_source(struct intsrc *isrc)
msi_enable_intr(struct intsrc *isrc)
msi_disable_intr(struct intsrc *isrc)
msi_vector(struct intsrc *isrc)
msi_source_pending(struct intsrc *isrc)
msi_config_intr(struct intsrc *isrc, enum intr_trigger trig,
msi_assign_cpu(struct intsrc *isrc, u_int apic_id)
struct intsrc *isrc;
struct intsrc *isrc;
struct intsrc *isrc;
struct intsrc *isrc;
xen_intr_pic_enable_source(struct intsrc *isrc)
_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
xen_intr_pic_disable_source(struct intsrc *isrc, int eoi)
_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
xen_intr_pic_eoi_source(struct intsrc *isrc)
xen_intr_pic_enable_intr(struct intsrc *isrc)
_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
xen_intr_pic_disable_intr(struct intsrc *isrc)
_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
xen_intr_pic_vector(struct intsrc *isrc)
_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
xen_intr_pic_source_pending(struct intsrc *isrc)
xen_intr_pic_config_intr(struct intsrc *isrc, enum intr_trigger trig,
xen_intr_pic_assign_cpu(struct intsrc *isrc, u_int apic_id)
_Static_assert(offsetof(struct xenisrc, xi_arch.intsrc) == 0,
KASSERT(isrc->xi_arch.intsrc.is_pic == &xen_intr_pic,
KASSERT(isrc->xi_arch.intsrc.is_handlers == 0,
isrc->xi_arch.intsrc.is_pic = &xen_intr_pic;
error = intr_register_source(&isrc->xi_arch.intsrc);
KASSERT(isrc->xi_arch.intsrc.is_handlers == 0,