intel_ntb_reg_write
intel_ntb_reg_write(8, XEON_GEN3_REG_IMINT_DISABLE, ~0ULL);
intel_ntb_reg_write(8, XEON_GEN3_REG_IMINT_STATUS, reg);
intel_ntb_reg_write(1, XEON_GEN3_REG_IMINTVEC00 + i, i);
intel_ntb_reg_write(1,
intel_ntb_reg_write(8, XEON_GEN3_REG_IMINT_DISABLE, 0ULL);
intel_ntb_reg_write(8, XEON_GEN4_REG_IMINT_DISABLE, ~0ULL);
intel_ntb_reg_write(8, XEON_GEN4_REG_IMINT_STATUS, reg);
intel_ntb_reg_write(1, XEON_GEN4_REG_INTVEC + i, i);
intel_ntb_reg_write(8, XEON_GEN4_REG_IMINT_DISABLE, 0ULL);
intel_ntb_reg_write(8, regoff, val);
intel_ntb_reg_write(2, regoff, (uint16_t)val);
intel_ntb_reg_write(4, XEON_GEN3_REG_IMINT_STATUS,
intel_ntb_reg_write(8, XEON_GEN3_REG_IMINT_STATUS,
intel_ntb_reg_write(8, XEON_GEN4_REG_IMINT_STATUS,
intel_ntb_reg_write(2, XEON_SPCICMD_OFFSET,
intel_ntb_reg_write(2, XEON_GEN3_EXT_REG_PCI_CMD,
intel_ntb_reg_write(2, XEON_GEN4_REG_LINK_CTRL, lnkctl);
intel_ntb_reg_write(2, ATOM_SPCICMD_OFFSET,
intel_ntb_reg_write(8, ATOM_PBAR2XLAT_OFFSET,
intel_ntb_reg_write(8, ATOM_PBAR4XLAT_OFFSET,
intel_ntb_reg_write(8, ATOM_MBAR23_OFFSET, XEON_B2B_BAR2_ADDR64);
intel_ntb_reg_write(8, ATOM_MBAR45_OFFSET, XEON_B2B_BAR4_ADDR64);
intel_ntb_reg_write(8, ATOM_PBAR2XLAT_OFFSET,
intel_ntb_reg_write(8, ATOM_PBAR4XLAT_OFFSET,
intel_ntb_reg_write(8, ATOM_MBAR23_OFFSET, XEON_B2B_BAR2_ADDR64);
intel_ntb_reg_write(8, ATOM_MBAR45_OFFSET, XEON_B2B_BAR4_ADDR64);
intel_ntb_reg_write(4, base_reg, bar_addr);
intel_ntb_reg_write(4, lmt_reg, bar_addr);
intel_ntb_reg_write(8, base_reg, bar_addr);
intel_ntb_reg_write(8, lmt_reg, bar_addr);
intel_ntb_reg_write(4, bar->pbarxlat_off, base_addr);
intel_ntb_reg_write(8, bar->pbarxlat_off, base_addr);
intel_ntb_reg_write(8, XEON_SBAR0BASE_OFFSET, bar_addr);
intel_ntb_reg_write(8, XEON_SBAR2XLAT_OFFSET, 0);
intel_ntb_reg_write(8, XEON_SBAR4XLAT_OFFSET, 0);
intel_ntb_reg_write(8, xlat_reg, MSI_INTEL_ADDR_BASE);
intel_ntb_reg_write(8, lmt_reg, 0);
intel_ntb_reg_write(4, xlat_reg, MSI_INTEL_ADDR_BASE);
intel_ntb_reg_write(4, lmt_reg, 0);
intel_ntb_reg_write(8, XEON_PBAR2LMT_OFFSET, 0);
intel_ntb_reg_write(8, XEON_PBAR4LMT_OFFSET, 0);
intel_ntb_reg_write(4, XEON_B2B_XLAT_OFFSETL, bar_addr & 0xffffffff);
intel_ntb_reg_write(4, XEON_B2B_XLAT_OFFSETU, bar_addr >> 32);
intel_ntb_reg_write(8, XEON_GEN3_REG_IMBAR1XBASE, 0);
intel_ntb_reg_write(8, XEON_GEN3_REG_IMBAR2XBASE, 0);
intel_ntb_reg_write(8, XEON_GEN3_REG_IMBAR1XLIMIT, 0);
intel_ntb_reg_write(8, XEON_GEN3_REG_IMBAR2XLIMIT, 0);
intel_ntb_reg_write(8, XEON_GEN3_REG_EMBAR1XLIMIT, reg);
intel_ntb_reg_write(8, XEON_GEN3_REG_EMBAR2XLIMIT, reg);
intel_ntb_reg_write(8, XEON_GEN4_REG_IMBAR1XBASE, 0);
intel_ntb_reg_write(8, XEON_GEN4_REG_IMBAR2XBASE, 0);
intel_ntb_reg_write(8, XEON_GEN4_REG_IMBAR1XLIMIT, 0);
intel_ntb_reg_write(8, XEON_GEN4_REG_IMBAR2XLIMIT, 0);
intel_ntb_reg_write(1, ATOM_MODPHY_PCSREG6, 0xe0);
intel_ntb_reg_write(1, ATOM_MODPHY_PCSREG4, 0x40);
intel_ntb_reg_write(1, ATOM_MODPHY_PCSREG4, 0x60);
intel_ntb_reg_write(1, ATOM_MODPHY_PCSREG6, 0x60);
intel_ntb_reg_write(4, ATOM_ERRCORSTS_OFFSET, status);
intel_ntb_reg_write(4, ATOM_LTSSMERRSTS0_OFFSET, status);
intel_ntb_reg_write(4, ATOM_DESKEWSTS_OFFSET, status);
intel_ntb_reg_write(4, ATOM_IBSTERRRCRVSTS0_OFFSET, status);
intel_ntb_reg_write(4, ATOM_LTSSMSTATEJMP_OFFSET, status);
intel_ntb_reg_write(4, XEON_GEN4_REG_EXT_LTR_ACTIVE, ltr);
intel_ntb_reg_write(4, XEON_GEN4_REG_EXT_LTR_IDLE, ltr);
intel_ntb_reg_write(4, XEON_GEN4_REG_EXT_LTR_SWSEL, NTB_LTR_SWSEL_ACTIVE);
intel_ntb_reg_write(4, ntb->reg->ntb_ctl, cntl);
intel_ntb_reg_write(2, XEON_GEN4_REG_LINK_CTRL, lnkctl);
intel_ntb_reg_write(4, XEON_GEN4_REG_PPD0, ppd0);
intel_ntb_reg_write(4, ntb->reg->ntb_ctl, cntl);
intel_ntb_reg_write(4, ntb->reg->ntb_ctl, cntl);
intel_ntb_reg_write(2, XEON_GEN4_REG_LINK_CTRL, lnkctl);
intel_ntb_reg_write(4, XEON_GEN4_REG_EXT_LTR_SWSEL, NTB_LTR_SWSEL_IDLE);
intel_ntb_reg_write(4, ntb->reg->ntb_ctl, cntl);
intel_ntb_reg_write(2, XEON_GEN4_REG_SLOTSTS, GEN4_SLOTSTS_DLLSCS);
intel_ntb_reg_write(4, ntb->self_reg->spad + idx * 4, val);
intel_ntb_reg_write(4, ntb->peer_reg->spad + idx * 4, val);
intel_ntb_reg_write(8, xlat_reg, addr);
intel_ntb_reg_write(8, xlat_reg, 0);
intel_ntb_reg_write(8, limit_reg, limit);
intel_ntb_reg_write(8, limit_reg, base);
intel_ntb_reg_write(8, xlat_reg, 0);
intel_ntb_reg_write(4, xlat_reg, addr);
intel_ntb_reg_write(4, xlat_reg, 0);
intel_ntb_reg_write(4, limit_reg, limit);
intel_ntb_reg_write(4, limit_reg, base);
intel_ntb_reg_write(4, xlat_reg, 0);
intel_ntb_reg_write(1,