sys/arm64/arm64/cpu_errata.c

61

CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX, 0, 0),

sys/arm64/arm64/cpu_errata.c

67

CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX_81XX, 0, 0),

sys/arm64/arm64/spec_workaround.c

58

.midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A57,0,0),

sys/arm64/arm64/spec_workaround.c

62

.midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A72,0,0),

sys/arm64/arm64/spec_workaround.c

66

.midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A73,0,0),

sys/arm64/arm64/spec_workaround.c

70

.midr_value = CPU_ID_RAW(CPU_IMPL_ARM, CPU_PART_CORTEX_A75,0,0),

sys/arm64/arm64/spec_workaround.c

75

CPU_ID_RAW(CPU_IMPL_CAVIUM, CPU_PART_THUNDERX2, 0,0),

sys/arm64/include/cpu.h

198

((mask) & CPU_ID_RAW((impl), (part), (var), (rev))))