sys/arm64/vmm/io/vgic_v3.c

1474

vmpidr_el2 = hypctx_read_sys_reg(hypctx, HOST_VMPIDR_EL2);

sys/arm64/vmm/io/vgic_v3.c

2207

lr = hypctx_read_sys_reg(hypctx, HOST_ICH_LR_EL2(i));

sys/arm64/vmm/io/vgic_v3.c

434

if (hypctx != NULL && (hypctx_read_sys_reg(hypctx, HOST_VMPIDR_EL2) & GICD_AFF) == mpidr)

sys/arm64/vmm/io/vgic_v3.c

484

irq->mpidr = hypctx_read_sys_reg(hypctx, HOST_VMPIDR_EL2) & GICD_AFF;

sys/arm64/vmm/io/vtimer.c

100

hypctx_read_sys_reg(hypctx, HOST_CNTVOFF_EL2);

sys/arm64/vmm/io/vtimer.c

283

hypctx_read_sys_reg(hypctx, HOST_CNTVOFF_EL2);

sys/arm64/vmm/io/vtimer.c

286

if ((hypctx_read_sys_reg(hypctx, HOST_CNTHCTL_EL2) & CNTHCTL_ECV_EN) != 0) {

sys/arm64/vmm/io/vtimer.c

325

hypctx_read_sys_reg(hypctx, HOST_CNTVOFF_EL2);

sys/arm64/vmm/io/vtimer.c

382

cntpct_el0 = READ_SPECIALREG(cntpct_el0) - hypctx_read_sys_reg(hypctx, HOST_CNTVOFF_EL2);

sys/arm64/vmm/io/vtimer.c

425

*rval = READ_SPECIALREG(cntpct_el0) - hypctx_read_sys_reg(hypctx, HOST_CNTVOFF_EL2);

sys/arm64/vmm/io/vtimer.c

488

hypctx_read_sys_reg(hypctx, HOST_CNTVOFF_EL2);

sys/arm64/vmm/io/vtimer.c

505

cntpct_el0 = READ_SPECIALREG(cntpct_el0) - hypctx_read_sys_reg(hypctx, HOST_CNTVOFF_EL2);

sys/arm64/vmm/vmm.c

865

if ((hypctx_read_sys_reg(hypctx, HOST_ESR_EL2) & ESR_ELx_ISS_MASK) != 0)

sys/arm64/vmm/vmm.c

869

vme->u.smccc_call.func_id = hypctx_read_sys_reg(hypctx, GPR_X(0));

sys/arm64/vmm/vmm.c

871

vme->u.smccc_call.args[i] = hypctx_read_sys_reg(hypctx, GPR_X(i + 1));

sys/arm64/vmm/vmm_arm64.c

1117

hypctx_read_sys_reg(hypctx, HOST_ELR_EL2));

sys/arm64/vmm/vmm_arm64.c

1119

mode = hypctx_read_sys_reg(hypctx, HOST_SPSR_EL2) &

sys/arm64/vmm/vmm_arm64.c

1122

vbar_el1 = hypctx_read_sys_reg(hypctx, VBAR_EL1);

sys/arm64/vmm/vmm_arm64.c

1140

new_spsr = hypctx_read_sys_reg(hypctx, HOST_SPSR_EL2);

sys/arm64/vmm/vmm_arm64.c

1153

if ((hypctx_read_sys_reg(hypctx, SCTLR_EL1) &

sys/arm64/vmm/vmm_arm64.c

1157

if ((hypctx_read_sys_reg(hypctx, SCTLR_EL1) &

sys/arm64/vmm/vmm_arm64.c

1209

vme->pc = hypctx_read_sys_reg(hypctx, HOST_ELR_EL2);

sys/arm64/vmm/vmm_arm64.c

1212

vme->u.hyp.esr_el2 = hypctx_read_sys_reg(hypctx, HOST_ESR_EL2);

sys/arm64/vmm/vmm_arm64.c

1213

vme->u.hyp.far_el2 = hypctx_read_sys_reg(hypctx, HOST_FAR_EL2);

sys/arm64/vmm/vmm_arm64.c

1214

vme->u.hyp.hpfar_el2 = hypctx_read_sys_reg(hypctx, HOST_HPFAR_EL2);

sys/arm64/vmm/vmm_arm64.c

1417

hypctx->debug_spsr |= (hypctx_read_sys_reg(hypctx,

sys/arm64/vmm/vmm_arm64.c

1419

hypctx->debug_mdscr |= (hypctx_read_sys_reg(hypctx,

sys/arm64/vmm/vmm_arm64.c

1443

host_spsr_el2 = hypctx_read_sys_reg(hypctx, HOST_SPSR_EL2);

sys/arm64/vmm/vmm_arm64.c

641

HPFAR_EL2_FIPA_ADDR(hypctx_read_sys_reg(hypctx, HOST_HPFAR_EL2));

sys/arm64/vmm/vmm_arm64.c

643

vme_ret->u.inst_emul.gpa += hypctx_read_sys_reg(hypctx, HOST_FAR_EL2) &

sys/arm64/vmm/vmm_arm64.c

656

paging->ttbr0_addr = hypctx_read_sys_reg(hypctx, TTBR0_EL1) &

sys/arm64/vmm/vmm_arm64.c

658

paging->ttbr1_addr = hypctx_read_sys_reg(hypctx, TTBR1_EL1) &

sys/arm64/vmm/vmm_arm64.c

660

paging->tcr_el1 = hypctx_read_sys_reg(hypctx, TCR_EL1);

sys/arm64/vmm/vmm_arm64.c

661

paging->tcr2_el1 = hypctx_read_sys_reg(hypctx, TCR2_EL1);

sys/arm64/vmm/vmm_arm64.c

662

paging->flags = hypctx_read_sys_reg(hypctx, HOST_SPSR_EL2) & (PSR_M_MASK | PSR_M_32);

sys/arm64/vmm/vmm_arm64.c

663

if ((hypctx_read_sys_reg(hypctx, SCTLR_EL1) & SCTLR_M) != 0)

sys/arm64/vmm/vmm_arm64.c

688

if ((hypctx_read_sys_reg(hypctx, HOST_SPSR_EL2) & PSR_M_MASK) == PSR_M_EL0t)

sys/arm64/vmm/vmm_arm64.c

696

esr |= hypctx_read_sys_reg(hypctx, HOST_ESR_EL2) & ESR_ELx_IL;

sys/arm64/vmm/vmm_arm64.c

708

esr_ec = ESR_ELx_EXCEPTION(hypctx_read_sys_reg(hypctx, HOST_ESR_EL2));

sys/arm64/vmm/vmm_arm64.c

709

esr_iss = hypctx_read_sys_reg(hypctx, HOST_ESR_EL2) & ESR_ELx_ISS_MASK;

sys/arm64/vmm/vmm_arm64.c

718

if ((hypctx_read_sys_reg(hypctx, HOST_ESR_EL2) & 0x3) == 0) { /* WFI */

sys/arm64/vmm/vmm_arm64.c

747

switch (hypctx_read_sys_reg(hypctx, HOST_ESR_EL2) & ISS_DATA_DFSC_MASK) {

sys/arm64/vmm/vmm_arm64.c

758

gpa = HPFAR_EL2_FIPA_ADDR(hypctx_read_sys_reg(hypctx, HOST_HPFAR_EL2));

sys/arm64/vmm/vmm_arm64.c

762

hypctx_read_sys_reg(hypctx, HOST_FAR_EL2),

sys/arm64/vmm/vmm_arm64.c

772

vme_ret->u.paging.esr = hypctx_read_sys_reg(hypctx, HOST_ESR_EL2);

sys/arm64/vmm/vmm_arm64.c

780

hypctx_read_sys_reg(hypctx, HOST_FAR_EL2), false,

sys/arm64/vmm/vmm_hyp.c

125

switch ((hypctx_read_sys_reg(hypctx, PMCR_EL0) & PMCR_N_MASK) >>

sys/arm64/vmm/vmm_hyp.c

256

ecv_poff = (hypctx_read_sys_reg(hypctx, HOST_CNTHCTL_EL2) &

sys/arm64/vmm/vmm_hyp.c

355

WRITE_SPECIALREG(hcr_el2, hypctx_read_sys_reg(hypctx, HOST_HCR_EL2));

sys/arm64/vmm/vmm_hyp.c

359

hypctx_read_sys_reg(hypctx, HOST_HCRX_EL2));

sys/arm64/vmm/vmm_hyp.c

369

hypctx_read_sys_reg(hypctx, HOST_HDFGWTR_EL2));

sys/arm64/vmm/vmm_hyp.c

371

hypctx_read_sys_reg(hypctx, HOST_HFGITR_EL2));

sys/arm64/vmm/vmm_hyp.c

373

hypctx_read_sys_reg(hypctx, HOST_HFGRTR_EL2));

sys/arm64/vmm/vmm_hyp.c

375

hypctx_read_sys_reg(hypctx, HOST_HFGWTR_EL2));

sys/arm64/vmm/vmm_hyp.c

380

hypctx_read_sys_reg(hypctx, HOST_HDFGRTR2_EL2));

sys/arm64/vmm/vmm_hyp.c

382

hypctx_read_sys_reg(hypctx, HOST_HDFGWTR2_EL2));

sys/arm64/vmm/vmm_hyp.c

384

hypctx_read_sys_reg(hypctx, HOST_HFGITR2_EL2));

sys/arm64/vmm/vmm_hyp.c

386

hypctx_read_sys_reg(hypctx, HOST_HFGRTR2_EL2));

sys/arm64/vmm/vmm_hyp.c

388

hypctx_read_sys_reg(hypctx, HOST_HFGWTR2_EL2));

sys/arm64/vmm/vmm_hyp.c

393

WRITE_SPECIALREG(sp_el0, hypctx_read_sys_reg(hypctx, SP_EL0));

sys/arm64/vmm/vmm_hyp.c

394

WRITE_SPECIALREG(tpidr_el0, hypctx_read_sys_reg(hypctx, TPIDR_EL0));

sys/arm64/vmm/vmm_hyp.c

395

WRITE_SPECIALREG(tpidrro_el0, hypctx_read_sys_reg(hypctx, TPIDRRO_EL0));

sys/arm64/vmm/vmm_hyp.c

396

WRITE_SPECIALREG(tpidr_el1, hypctx_read_sys_reg(hypctx, TPIDR_EL1));

sys/arm64/vmm/vmm_hyp.c

398

WRITE_SPECIALREG(actlr_el1, hypctx_read_sys_reg(hypctx, ACTLR_EL1));

sys/arm64/vmm/vmm_hyp.c

399

WRITE_SPECIALREG(csselr_el1, hypctx_read_sys_reg(hypctx, CSSELR_EL1));

sys/arm64/vmm/vmm_hyp.c

400

WRITE_SPECIALREG(mdccint_el1, hypctx_read_sys_reg(hypctx, MDCCINT_EL1));

sys/arm64/vmm/vmm_hyp.c

401

WRITE_SPECIALREG(mdscr_el1, hypctx_read_sys_reg(hypctx, MDSCR_EL1));

sys/arm64/vmm/vmm_hyp.c

405

hypctx_read_sys_reg(hypctx, ELR_EL1));

sys/arm64/vmm/vmm_hyp.c

407

hypctx_read_sys_reg(hypctx, VBAR_EL1));

sys/arm64/vmm/vmm_hyp.c

409

hypctx_read_sys_reg(hypctx, AFSR0_EL1));

sys/arm64/vmm/vmm_hyp.c

411

hypctx_read_sys_reg(hypctx, AFSR1_EL1));

sys/arm64/vmm/vmm_hyp.c

413

hypctx_read_sys_reg(hypctx, AMAIR_EL1));

sys/arm64/vmm/vmm_hyp.c

415

hypctx_read_sys_reg(hypctx, CONTEXTIDR_EL1));

sys/arm64/vmm/vmm_hyp.c

417

hypctx_read_sys_reg(hypctx, CPACR_EL1));

sys/arm64/vmm/vmm_hyp.c

419

hypctx_read_sys_reg(hypctx, ESR_EL1));

sys/arm64/vmm/vmm_hyp.c

421

hypctx_read_sys_reg(hypctx, FAR_EL1));

sys/arm64/vmm/vmm_hyp.c

423

hypctx_read_sys_reg(hypctx, MAIR_EL1));

sys/arm64/vmm/vmm_hyp.c

425

hypctx_read_sys_reg(hypctx, SCTLR_EL1));

sys/arm64/vmm/vmm_hyp.c

427

hypctx_read_sys_reg(hypctx, SPSR_EL1));

sys/arm64/vmm/vmm_hyp.c

429

hypctx_read_sys_reg(hypctx, TCR_EL1));

sys/arm64/vmm/vmm_hyp.c

432

hypctx_read_sys_reg(hypctx, TTBR0_EL1));

sys/arm64/vmm/vmm_hyp.c

434

hypctx_read_sys_reg(hypctx, TTBR1_EL1));

sys/arm64/vmm/vmm_hyp.c

438

WRITE_SPECIALREG(par_el1, hypctx_read_sys_reg(hypctx, PAR_EL1));

sys/arm64/vmm/vmm_hyp.c

442

hypctx_read_sys_reg(hypctx, HOST_CPTR_EL2));

sys/arm64/vmm/vmm_hyp.c

444

hypctx_read_sys_reg(hypctx, HOST_VPIDR_EL2));

sys/arm64/vmm/vmm_hyp.c

446

hypctx_read_sys_reg(hypctx, HOST_VMPIDR_EL2));

sys/arm64/vmm/vmm_hyp.c

449

WRITE_SPECIALREG(sp_el1, hypctx_read_sys_reg(hypctx, HOST_SP_EL1));

sys/arm64/vmm/vmm_hyp.c

450

WRITE_SPECIALREG(elr_el2, hypctx_read_sys_reg(hypctx, HOST_ELR_EL2));

sys/arm64/vmm/vmm_hyp.c

451

WRITE_SPECIALREG(spsr_el2, hypctx_read_sys_reg(hypctx, HOST_SPSR_EL2));

sys/arm64/vmm/vmm_hyp.c

461

hypctx_read_sys_reg(hypctx, PMCR_EL0));

sys/arm64/vmm/vmm_hyp.c

463

hypctx_read_sys_reg(hypctx, PMCCNTR_EL0));

sys/arm64/vmm/vmm_hyp.c

465

hypctx_read_sys_reg(hypctx, PMCCFILTR_EL0));

sys/arm64/vmm/vmm_hyp.c

467

hypctx_read_sys_reg(hypctx, PMUSERENR_EL0));

sys/arm64/vmm/vmm_hyp.c

469

hypctx_read_sys_reg(hypctx, PMSELR_EL0));

sys/arm64/vmm/vmm_hyp.c

471

hypctx_read_sys_reg(hypctx, PMXEVCNTR_EL0));

sys/arm64/vmm/vmm_hyp.c

475

hypctx_read_sys_reg(hypctx, PMCNTENSET_EL0));

sys/arm64/vmm/vmm_hyp.c

478

hypctx_read_sys_reg(hypctx, PMINTENSET_EL1));

sys/arm64/vmm/vmm_hyp.c

481

hypctx_read_sys_reg(hypctx, PMOVSSET_EL0));

sys/arm64/vmm/vmm_hyp.c

483

switch ((hypctx_read_sys_reg(hypctx, PMCR_EL0) & PMCR_N_MASK) >>

sys/arm64/vmm/vmm_hyp.c

488

hypctx_read_sys_reg(hypctx, PMEVCNTR_EL0(x))); \

sys/arm64/vmm/vmm_hyp.c

490

hypctx_read_sys_reg(hypctx, PMEVTYPER_EL0(x)))

sys/arm64/vmm/vmm_hyp.c

529

hypctx_read_sys_reg(hypctx, DBGCLAIMSET_EL1));

sys/arm64/vmm/vmm_hyp.c

536

hypctx_read_sys_reg(hypctx, DBGBCR_EL1(x))); \

sys/arm64/vmm/vmm_hyp.c

538

hypctx_read_sys_reg(hypctx, DBGBVR_EL1(x)))

sys/arm64/vmm/vmm_hyp.c

563

hypctx_read_sys_reg(hypctx, DBGWCR_EL1(x))); \

sys/arm64/vmm/vmm_hyp.c

565

hypctx_read_sys_reg(hypctx, DBGWVR_EL1(x)))

sys/arm64/vmm/vmm_hyp.c

591

ecv_poff = (hypctx_read_sys_reg(hypctx, HOST_CNTHCTL_EL2) &

sys/arm64/vmm/vmm_hyp.c

595

hypctx_read_sys_reg(hypctx, HOST_CNTHCTL_EL2));

sys/arm64/vmm/vmm_hyp.c

597

hypctx_read_sys_reg(hypctx, HOST_CNTVOFF_EL2));

sys/arm64/vmm/vmm_hyp.c

613

hypctx_read_sys_reg(hypctx, HOST_CNTVOFF_EL2));

sys/arm64/vmm/vmm_hyp.c

637

hypctx_read_sys_reg(hypctx, HOST_ICH_HCR_EL2));

sys/arm64/vmm/vmm_hyp.c

639

hypctx_read_sys_reg(hypctx, HOST_ICH_VMCR_EL2));

sys/arm64/vmm/vmm_hyp.c

648

hypctx_read_sys_reg(hypctx, HOST_ICH_LR_EL2(x)))

sys/arm64/vmm/vmm_hyp.c

673

hypctx_read_sys_reg(hypctx, HOST_ICH_AP0R_EL2(x))); \

sys/arm64/vmm/vmm_hyp.c

675

hypctx_read_sys_reg(hypctx, HOST_ICH_AP1R_EL2(x)))

sys/arm64/vmm/vmm_hyp.c

710

host_esr_el2 = hypctx_read_sys_reg(hypctx, HOST_ESR_EL2);

sys/arm64/vmm/vmm_hyp.c

748

host_far_el2 = hypctx_read_sys_reg(hypctx, HOST_FAR_EL2);

sys/arm64/vmm/vmm_hyp.c

765

WRITE_SPECIALREG(vttbr_el2, hypctx_read_sys_reg(hypctx, HOST_VTTBR_EL2));

sys/arm64/vmm/vmm_hyp.c

766

WRITE_SPECIALREG(mdcr_el2, hypctx_read_sys_reg(hypctx, HOST_MDCR_EL2));

sys/arm64/vmm/vmm_hyp.c

769

WRITE_SPECIALREG(mdcr_el2, hypctx_read_sys_reg(host_hypctx, HOST_MDCR_EL2));

sys/arm64/vmm/vmm_reset.c

113

(hypctx_read_sys_reg(el2ctx, PMCR_EL0) & PMCR_N_MASK) >> PMCR_N_SHIFT;