ich_wr
ich_wr(sc, ICH_REG_GLOB_CNT, control, 4);
ich_wr(sc, regbase + ICH_REG_X_CR, 0, 1);
ich_wr(sc, regbase + ICH_REG_X_CR, ICH_X_CR_RR, 1);
ich_wr(sc, ch->regbase + ICH_REG_X_BDBAR, (uint32_t)(ch->desc_addr), 4);
ich_wr(sc, ch->regbase + ICH_REG_X_LVI, ch->blkcnt - 1, 1);
ich_wr(sc, ch->regbase + ICH_REG_X_BDBAR, (uint32_t)(ch->desc_addr), 4);
ich_wr(sc, ch->regbase + ICH_REG_X_CR, ICH_X_CR_RPBM | ICH_X_CR_LVBIE | ICH_X_CR_IOCE, 1);
ich_wr(sc, ICH_REG_GLOB_STA, gs, 4);
ich_wr(sc, ch->regbase + ICH_REG_X_LVI, lvi, 1);
ich_wr(sc, ch->regbase +
ich_wr(sc, ch->regbase + ICH_REG_X_BDBAR, (uint32_t)(ch->desc_addr), 4);
ich_wr(sc, ch->regbase + ICH_REG_X_CR, ICH_X_CR_RPBM, 1);
ich_wr(sc, ch->regbase + ICH_REG_X_CR, 0, 1);
ich_wr(sc, ch->regbase + ICH_REG_X_CR, ICH_X_CR_RR, 1);
ich_wr(sc, ICH_REG_GLOB_CNT, ICH_GLOB_CTL_COLD, 4);
ich_wr(sc, ICH_REG_GLOB_CNT, ICH_GLOB_CTL_COLD | ICH_GLOB_CTL_PRES, 4);
ich_wr(sc, ICH_REG_GLOB_CNT, ICH_GLOB_CTL_COLD, 4);