i2c_write_reg
i2c_write_reg(sc, off, status);
i2c_write_reg(sc, I2C_STATUS_REG, 0);
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN);
i2c_write_reg(sc, I2C_CONTROL_REG, 0);
i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
i2c_write_reg(sc, I2C_DATA_REG, slave);
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN);
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX);
i2c_write_reg(sc, I2C_STATUS_REG, 0);
i2c_write_reg(sc, I2C_DATA_REG, slave);
i2c_write_reg(sc, I2C_CONTROL_REG, 0x0);
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN);
i2c_write_reg(sc, I2C_CONTROL_REG, 0);
i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
i2c_write_reg(sc, I2C_CONTROL_REG, 0x0);
i2c_write_reg(sc, I2C_FDR_REG, (uint8_t)clkdiv_table[i].regcode);
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
i2c_write_reg(sc, I2C_DATA_REG, *buf++);
i2c_write_reg(sc, off, status);
i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE);
i2c_write_reg(sc, I2C_DATA_REG, slave);
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_MSTA | I2CCR_MTX);
i2c_write_reg(sc, I2C_DATA_REG, slave);
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN | I2CCR_TXAK);
i2c_write_reg(sc, I2C_CONTROL_REG, 0x0);
i2c_write_reg(sc, I2C_STATUS_REG, 0x0);
i2c_write_reg(sc, I2C_FDR_REG, baud_rate);
i2c_write_reg(sc, I2C_DFSRR_REG, I2C_DFSSR_DIV);
i2c_write_reg(sc, I2C_CONTROL_REG, I2C_ENABLE);
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
i2c_write_reg(sc, I2C_CONTROL_REG, I2CCR_MEN |
i2c_write_reg(sc, I2C_DATA_REG, *buf++);