Symbol: fence
sys/arm/allwinner/aw_gpio.c
89
#define IRQ_MEMORY_BARRIER(x) fence()
sys/dev/bnxt/bnxt_re/ib_verbs.c
590
struct bnxt_re_legacy_fence_data *fence = &pd->fence;
sys/dev/bnxt/bnxt_re/ib_verbs.c
591
struct ib_mr *ib_mr = &fence->mr->ib_mr;
sys/dev/bnxt/bnxt_re/ib_verbs.c
592
struct bnxt_qplib_swqe *wqe = &fence->bind_wqe;
sys/dev/bnxt/bnxt_re/ib_verbs.c
605
wqe->bind.va = (u64)fence->va;
sys/dev/bnxt/bnxt_re/ib_verbs.c
606
wqe->bind.length = fence->size;
sys/dev/bnxt/bnxt_re/ib_verbs.c
613
fence->bind_rkey = ib_inc_rkey(fence->mw->rkey);
sys/dev/bnxt/bnxt_re/ib_verbs.c
622
struct bnxt_re_legacy_fence_data *fence = &pd->fence;
sys/dev/bnxt/bnxt_re/ib_verbs.c
623
struct bnxt_qplib_swqe *fence_wqe = &fence->bind_wqe;
sys/dev/bnxt/bnxt_re/ib_verbs.c
631
wqe.bind.r_key = fence->bind_rkey;
sys/dev/bnxt/bnxt_re/ib_verbs.c
632
fence->bind_rkey = ib_inc_rkey(fence->bind_rkey);
sys/dev/bnxt/bnxt_re/ib_verbs.c
650
struct bnxt_re_legacy_fence_data *fence = &pd->fence;
sys/dev/bnxt/bnxt_re/ib_verbs.c
665
fence->va = kzalloc(BNXT_RE_LEGACY_FENCE_BYTES, GFP_KERNEL);
sys/dev/bnxt/bnxt_re/ib_verbs.c
666
if (!fence->va)
sys/dev/bnxt/bnxt_re/ib_verbs.c
668
dma_addr = ib_dma_map_single(&rdev->ibdev, fence->va,
sys/dev/bnxt/bnxt_re/ib_verbs.c
675
fence->dma_addr = 0;
sys/dev/bnxt/bnxt_re/ib_verbs.c
678
fence->dma_addr = dma_addr;
sys/dev/bnxt/bnxt_re/ib_verbs.c
684
fence->mr = mr;
sys/dev/bnxt/bnxt_re/ib_verbs.c
698
mr->qplib_mr.va = (u64)fence->va;
sys/dev/bnxt/bnxt_re/ib_verbs.c
730
fence->mw = ib_mw;
sys/dev/bnxt/bnxt_re/ib_verbs.c
741
fence->mr = NULL;
sys/dev/bnxt/bnxt_re/ib_verbs.c
744
ib_dma_unmap_single(&rdev->ibdev, fence->dma_addr,
sys/dev/bnxt/bnxt_re/ib_verbs.c
746
fence->dma_addr = 0;
sys/dev/bnxt/bnxt_re/ib_verbs.c
749
kfree(fence->va);
sys/dev/bnxt/bnxt_re/ib_verbs.c
750
fence->va = NULL;
sys/dev/bnxt/bnxt_re/ib_verbs.c
756
struct bnxt_re_legacy_fence_data *fence = &pd->fence;
sys/dev/bnxt/bnxt_re/ib_verbs.c
758
struct bnxt_re_mr *mr = fence->mr;
sys/dev/bnxt/bnxt_re/ib_verbs.c
763
if (fence->mw) {
sys/dev/bnxt/bnxt_re/ib_verbs.c
764
bnxt_re_dealloc_mw(fence->mw);
sys/dev/bnxt/bnxt_re/ib_verbs.c
765
fence->mw = NULL;
sys/dev/bnxt/bnxt_re/ib_verbs.c
774
fence->mr = NULL;
sys/dev/bnxt/bnxt_re/ib_verbs.c
777
if (fence->dma_addr) {
sys/dev/bnxt/bnxt_re/ib_verbs.c
778
ib_dma_unmap_single(&rdev->ibdev, fence->dma_addr,
sys/dev/bnxt/bnxt_re/ib_verbs.c
781
fence->dma_addr = 0;
sys/dev/bnxt/bnxt_re/ib_verbs.c
783
kfree(fence->va);
sys/dev/bnxt/bnxt_re/ib_verbs.c
784
fence->va = NULL;
sys/dev/bnxt/bnxt_re/ib_verbs.h
161
struct bnxt_re_legacy_fence_data fence;
sys/dev/hwpmc/hwpmc_mod.c
198
static int pmc_debugflags_parse(char *newstr, char *fence);
sys/dev/hwpmc/hwpmc_mod.c
455
pmc_debugflags_parse(char *newstr, char *fence)
sys/dev/hwpmc/hwpmc_mod.c
466
for (p = newstr; p < fence && (c = *p); p++) {
sys/dev/hwpmc/hwpmc_mod.c
472
for (q = p; p < fence && (c = *p) && c != '='; p++)
sys/dev/hwpmc/hwpmc_mod.c
508
for (q = p; p < fence && (c = *p); p++)
sys/dev/hwpmc/hwpmc_mod.c
586
char *fence, *newstr;
sys/dev/hwpmc/hwpmc_mod.c
598
fence = newstr + (n < req->newlen ? n : req->newlen + 1);
sys/dev/hwpmc/hwpmc_mod.c
599
error = pmc_debugflags_parse(newstr, fence);
sys/dev/hyperv/vmbus/amd64/hyperv_machdep.c
137
#define HYPERV_TSC_TIMECOUNT(fence) \
sys/dev/hyperv/vmbus/amd64/hyperv_machdep.c
139
hyperv_tc64_tsc_##fence(void) \
sys/dev/hyperv/vmbus/amd64/hyperv_machdep.c
149
fence(); \
sys/dev/hyperv/vmbus/amd64/hyperv_machdep.c
169
hyperv_tsc_timecount_##fence(struct timecounter *tc __unused) \
sys/dev/hyperv/vmbus/amd64/hyperv_machdep.c
172
return (hyperv_tc64_tsc_##fence()); \
sys/dev/ioat/ioat.c
1171
hw_desc->u.control_generic.fence = 1;
sys/dev/ioat/ioat_internal.h
129
uint32_t fence:1;
sys/dev/ioat/ioat_internal.h
162
uint32_t fence:1;
sys/dev/ioat/ioat_internal.h
193
uint32_t fence:1;
sys/dev/ioat/ioat_internal.h
221
uint32_t fence:1;
sys/dev/ioat/ioat_internal.h
300
uint32_t fence:1;
sys/dev/ioat/ioat_internal.h
338
uint32_t fence:1;
sys/dev/ioat/ioat_internal.h
380
uint32_t fence:1;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3829
static u8 get_fence(u8 fence, const struct ib_send_wr *wr)
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3835
if (unlikely(fence)) {
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3839
return fence;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3875
int nreq, u8 fence, u8 next_fence,
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3883
ctrl->fm_ce_se |= fence;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3917
u8 fence;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
3943
fence = qp->fm_cache;
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4018
nreq, get_fence(fence, wr),
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4043
nreq, get_fence(fence, wr),
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4065
nreq, get_fence(fence, wr),
sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
4171
get_fence(fence, wr), next_fence,
sys/dev/smartpqi/smartpqi_request.c
222
raid_req->fence = 0;
sys/dev/smartpqi/smartpqi_request.c
352
aio_req->cmd_flags.fence = 0;
sys/dev/smartpqi/smartpqi_request.c
423
DBG_INFO("%15s: 0x%x\n", "fence", aio_req->cmd_flags.fence);
sys/dev/smartpqi/smartpqi_request.c
477
aio_req->cmd_flags.fence = 0;
sys/dev/smartpqi/smartpqi_request.c
545
DBG_INFO("%15s: 0x%x\n", "fence", aio_req->cmd_flags.fence);
sys/dev/smartpqi/smartpqi_request.c
623
aio_req->cmd_flags.fence = 0;
sys/dev/smartpqi/smartpqi_request.c
699
DBG_INFO("%15s: 0x%x\n", "fence", aio_req->cmd_flags.fence);
sys/dev/smartpqi/smartpqi_structures.h
670
uint8_t fence : 1;
sys/dev/smartpqi/smartpqi_structures.h
767
uint8_t fence : 1;
sys/dev/smartpqi/smartpqi_structures.h
812
uint8_t fence : 1;
sys/dev/smartpqi/smartpqi_structures.h
826
uint8_t fence : 1;
sys/dev/sym/sym_hipd.c
132
#define MEMORY_BARRIER() fence()
sys/riscv/include/atomic.h
102
fence(); \
sys/riscv/include/atomic.h
130
fence();
sys/riscv/include/atomic.h
139
fence();
sys/riscv/include/atomic.h
321
fence();
sys/riscv/include/atomic.h
330
fence();
sys/riscv/include/atomic.h
41
#define mb() fence()
sys/riscv/include/atomic.h
42
#define rmb() fence()
sys/riscv/include/atomic.h
43
#define wmb() fence()
sys/riscv/include/atomic.h
56
fence(); \
sys/riscv/include/atomic.h
578
fence();
sys/riscv/include/atomic.h
587
fence();
sys/riscv/include/atomic.h
614
fence();
sys/riscv/include/atomic.h
62
fence(); \
sys/riscv/include/atomic.h
621
fence();
sys/riscv/include/atomic.h
628
fence();
sys/riscv/include/atomic.h
635
fence();
sys/riscv/include/atomic.h
74
fence(); \
sys/riscv/include/atomic.h
82
fence(); \
sys/riscv/include/atomic.h
94
fence(); \
sys/riscv/include/encoding.h
809
DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE)
sys/riscv/riscv/busdma_bounce.c
842
fence();
sys/riscv/riscv/busdma_bounce.c
920
fence();
sys/riscv/riscv/pmap.c
1082
fence();
sys/riscv/riscv/pmap.c
1097
fence();
sys/riscv/riscv/pmap.c
1123
fence();
sys/riscv/riscv/pmap.c
5254
fence();
sys/riscv/vmm/vmm_fence.c
100
fence->type == VMM_RISCV_FENCE_VMA_ASID,
sys/riscv/vmm/vmm_fence.c
101
("%s: wrong fence type %d", __func__, fence->type));
sys/riscv/vmm/vmm_fence.c
103
switch (fence->type) {
sys/riscv/vmm/vmm_fence.c
105
for (va = fence->start; va < fence->start + fence->size;
sys/riscv/vmm/vmm_fence.c
110
if ((fence->start == 0 && fence->size == 0) ||
sys/riscv/vmm/vmm_fence.c
111
fence->size == -1)
sys/riscv/vmm/vmm_fence.c
112
sfence_vma_asid(fence->asid);
sys/riscv/vmm/vmm_fence.c
114
for (va = fence->start; va < fence->start + fence->size;
sys/riscv/vmm/vmm_fence.c
116
sfence_vma_asid_page(fence->asid, va);
sys/riscv/vmm/vmm_fence.c
126
struct vmm_fence fence;
sys/riscv/vmm/vmm_fence.c
140
while (vmm_fence_dequeue(hypctx, &fence) == true)
sys/riscv/vmm/vmm_fence.c
141
vmm_fence_process_one(&fence);
sys/riscv/vmm/vmm_fence.c
145
vmm_fence_add(struct vm *vm, cpuset_t *cpus, struct vmm_fence *fence)
sys/riscv/vmm/vmm_fence.c
167
switch (fence->type) {
sys/riscv/vmm/vmm_fence.c
172
if ((fence->start == 0 && fence->size == 0) ||
sys/riscv/vmm/vmm_fence.c
173
fence->size == -1)
sys/riscv/vmm/vmm_fence.c
184
fence->type));
sys/riscv/vmm/vmm_fence.c
193
if (vmm_fence_enqueue(hypctx, fence) == false)
sys/riscv/vmm/vmm_fence.c
53
struct vmm_fence *fence;
sys/riscv/vmm/vmm_fence.c
57
fence = &queue[hypctx->fence_queue_head];
sys/riscv/vmm/vmm_fence.c
58
if (fence->type != VMM_RISCV_FENCE_INVALID) {
sys/riscv/vmm/vmm_fence.c
59
*new_fence = *fence;
sys/riscv/vmm/vmm_fence.c
60
fence->type = VMM_RISCV_FENCE_INVALID;
sys/riscv/vmm/vmm_fence.c
76
struct vmm_fence *fence;
sys/riscv/vmm/vmm_fence.c
80
fence = &queue[hypctx->fence_queue_tail];
sys/riscv/vmm/vmm_fence.c
81
if (fence->type == VMM_RISCV_FENCE_INVALID) {
sys/riscv/vmm/vmm_fence.c
82
*fence = *new_fence;
sys/riscv/vmm/vmm_fence.c
95
vmm_fence_process_one(struct vmm_fence *fence)
sys/riscv/vmm/vmm_fence.c
99
KASSERT(fence->type == VMM_RISCV_FENCE_VMA ||
sys/riscv/vmm/vmm_fence.h
41
void vmm_fence_add(struct vm *vm, cpuset_t *cpus, struct vmm_fence *fence);
sys/riscv/vmm/vmm_sbi.c
108
vmm_fence_add(hyp->vm, &cpus, &fence);
sys/riscv/vmm/vmm_sbi.c
47
struct vmm_fence fence;
sys/riscv/vmm/vmm_sbi.c
63
fence.start = hypctx->guest_regs.hyp_a[2];
sys/riscv/vmm/vmm_sbi.c
64
fence.size = hypctx->guest_regs.hyp_a[3];
sys/riscv/vmm/vmm_sbi.c
65
fence.asid = hypctx->guest_regs.hyp_a[4];
sys/riscv/vmm/vmm_sbi.c
69
fence.type = VMM_RISCV_FENCE_I;
sys/riscv/vmm/vmm_sbi.c
72
fence.type = VMM_RISCV_FENCE_VMA;
sys/riscv/vmm/vmm_sbi.c
75
fence.type = VMM_RISCV_FENCE_VMA_ASID;
sys/x86/iommu/amd_cmd.c
171
bool intr, bool memw, bool fence)
sys/x86/iommu/amd_cmd.c
192
if (fence)
sys/x86/iommu/intel_qi.c
170
bool memw, bool fence)
sys/x86/iommu/intel_qi.c
179
(fence ? DMAR_IQ_DESCR_WAIT_FN : 0) |