envy24_wrmt
envy24_wrmt(sc, ENVY24_MT_RATE, code, 1);
envy24_wrmt(sc, ENVY24_MT_VOLIDX, 16, 1);
envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f7f, 2);
envy24_wrmt(sc, ENVY24_MT_VOLIDX, 17, 1);
envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f7f, 2);
envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2, 1);
envy24_wrmt(sc, ENVY24_MT_VOLUME, 0x7f00 | sc->left[ch], 2);
envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2 + 1, 1);
envy24_wrmt(sc, ENVY24_MT_VOLUME, (sc->right[ch] << 8) | 0x7f, 2);
envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2, 1);
envy24_wrmt(sc, ENVY24_MT_VOLUME, vol, 2);
envy24_wrmt(sc, ENVY24_MT_VOLIDX, ch * 2 + 1, 1);
envy24_wrmt(sc, ENVY24_MT_VOLUME, vol, 2);
envy24_wrmt(sc, regintr, cnt, 2);
envy24_wrmt(sc, ENVY24_MT_INT, intr & mask, 1);
envy24_wrmt(sc, ENVY24_MT_INT, intr | mask, 1);
envy24_wrmt(sc, ENVY24_MT_INT, (intr & mask) | stat, 1);
envy24_wrmt(sc, ENVY24_MT_INT, (intr & mask) | stat, 1);
envy24_wrmt(sc, ENVY24_MT_PCTL, stat | sw, 1);
envy24_wrmt(sc, ENVY24_MT_PCTL, stat & sw, 1);
envy24_wrmt(sc, ENVY24_MT_SPDOUT, reg, 2);
envy24_wrmt(sc, ENVY24_MT_PSDOUT, reg, 2);
envy24_wrmt(sc, ENVY24_MT_RECORD, reg, 4);
envy24_wrmt(sc, ENVY24_MT_RECORD, 0x00, 4);
envy24_wrmt(sc, ENVY24_MT_VOLRATE, 0x30, 1); /* 0x30 is default value */
envy24_wrmt(sc, ENVY24_MT_PADDR, sc->paddr, 4);
envy24_wrmt(sc, ENVY24_MT_PCNT, sc->psize / 4 - 1, 2);
envy24_wrmt(sc, ENVY24_MT_RADDR, sc->raddr, 4);
envy24_wrmt(sc, ENVY24_MT_RCNT, sc->rsize / 4 - 1, 2);
envy24_wrmt(sc, ENVY24_MT_AC97CMD, ENVY24_MT_AC97CMD_CLD, 1);
envy24_wrmt(sc, ENVY24_MT_AC97CMD, 0, 1);
envy24_wrmt(sc, ENVY24_MT_AC97CMD,
envy24_wrmt(sc, ENVY24_MT_AC97CMD, 0, 1);
envy24_wrmt(sc, ENVY24_MT_AC97IDX, (u_int32_t)regno, 1);
envy24_wrmt(sc, ENVY24_MT_AC97CMD, ENVY24_MT_AC97CMD_RD, 1);
envy24_wrmt(sc, ENVY24_MT_AC97IDX, (u_int32_t)regno, 1);
envy24_wrmt(sc, ENVY24_MT_AC97DLO, (u_int32_t)data, 2);
envy24_wrmt(sc, ENVY24_MT_AC97CMD, ENVY24_MT_AC97CMD_WR, 1);