elink_cb_reg_write
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_MODE, (val | EMAC_MODE_RESET));
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_MAC_MATCH, val);
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_MAC_MATCH + 4, val);
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_MODE, (val | EMAC_MODE_PORT_GMII));
elink_cb_reg_write(sc, emac_base + EMAC_REG_RX_PFC_MODE, 0);
elink_cb_reg_write(sc, emac_base + EMAC_REG_RX_PFC_MODE,
elink_cb_reg_write(sc, emac_base + EMAC_REG_RX_PFC_PARAM,
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_RX_MODE, val);
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_MODE, val);
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_RX_MTU_SIZE,
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_LED, tmp);
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_LED,
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_LED, tmp |
elink_cb_reg_write(sc, emac_base + EMAC_REG_EMAC_LED,
extern void elink_cb_reg_write(struct bxe_softc *sc, uint32_t reg_addr, uint32_t val);