sys/dev/sfxge/common/efx.h

1435

efx_nic_cfg_get(

sys/dev/sfxge/sfxge.c

581

const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp);

sys/dev/sfxge/sfxge.c

630

efx_nic_cfg_get(sc->enp)->enc_buftbl_limit,

sys/dev/sfxge/sfxge.c

752

if (efx_nic_cfg_get(enp)->enc_features & EFX_FEATURE_TXQ_CKSUM_OP_DESC)

sys/dev/sfxge/sfxge.c

759

(sfxge_tx_ring_entries > efx_nic_cfg_get(enp)->enc_txq_max_ndescs)) {

sys/dev/sfxge/sfxge.c

762

EFX_TXQ_MINNDESCS, efx_nic_cfg_get(enp)->enc_txq_max_ndescs);

sys/dev/sfxge/sfxge.c

777

NULL, efx_nic_cfg_get(enp)->enc_phy_type,

sys/dev/sfxge/sfxge_ev.c

131

(delta > efx_nic_cfg_get(sc->enp)->enc_rx_batch_max)) {

sys/dev/sfxge/sfxge_ev.c

602

efx_nic_cfg_get(sc->enp)->enc_evq_timer_max_us) {

sys/dev/sfxge/sfxge_mcdi.c

233

const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp);

sys/dev/sfxge/sfxge_port.c

638

uint64_t stat_mask = efx_nic_cfg_get(sc->enp)->enc_phy_stat_mask;

sys/dev/sfxge/sfxge_port.c

792

mac_nstats = efx_nic_cfg_get(sc->enp)->enc_mac_stats_nstats;

sys/dev/sfxge/sfxge_rx.c

1082

encp = efx_nic_cfg_get(sc->enp);

sys/dev/sfxge/sfxge_tx.c

1043

const efx_nic_cfg_t *encp = efx_nic_cfg_get(txq->sc->enp);

sys/dev/sfxge/sfxge_tx.c

1573

if (efx_nic_cfg_get(sc->enp)->enc_hw_tx_insert_vlan_enabled)

sys/dev/sfxge/sfxge_tx.c

1807

const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp);

sys/dev/sfxge/sfxge_tx.c

2001

const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp);