sys/arm/nvidia/tegra124/tegra124_clk_per.c

418

CLK_8_1(0, "pc_i2s1", mux_a_N_audio1_N_p_N_clkm, CLK_SOURCE_I2S1, DCF_HAVE_ENA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

419

CLK_8_1(0, "pc_i2s2", mux_a_N_audio2_N_p_N_clkm, CLK_SOURCE_I2S2, DCF_HAVE_ENA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

420

CLK_8_1(0, "pc_spdif_out", mux_a_N_audio_N_p_N_clkm, CLK_SOURCE_SPDIF_OUT, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

421

CLK_8_1(0, "pc_spdif_in", mux_p_c2_c_c3_m, CLK_SOURCE_SPDIF_IN, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

422

CLK_8_1(0, "pc_pwm", mux_p_c2_c_c3_clks_N_clkm, CLK_SOURCE_PWM, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

423

CLK_8_1(0, "pc_spi2", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_SPI2, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

424

CLK_8_1(0, "pc_spi3", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_SPI3, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

427

CLK_8_1(0, "pc_spi1", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_SPI1, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

430

CLK_8_1(0, "pc_isp", mux_m_c_p_a_c2_c3_clkm_c4, CLK_SOURCE_ISP, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

431

CLK_8_1(0, "pc_vi", mux_m_c2_c_c3_p_N_a_c4, CLK_SOURCE_VI, DCF_IS_VI),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

432

CLK_8_1(0, "pc_sdmmc1", mux_p_c2_c_c3_m_e_clkm, CLK_SOURCE_SDMMC1, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

433

CLK_8_1(0, "pc_sdmmc2", mux_p_c2_c_c3_m_e_clkm, CLK_SOURCE_SDMMC2, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

434

CLK_8_1(0, "pc_sdmmc4", mux_p_c2_c_c3_m_e_clkm, CLK_SOURCE_SDMMC4, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

435

CLK_8_1(0, "pc_vfir", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_VFIR, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

436

CLK_8_1(0, "pc_hsi", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_HSI, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

439

CLK_8_1(0, "pc_host1x", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_HOST1X, DCF_IS_HOST1X),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

440

CLK_8_1(0, "pc_hdmi", mux_p_m_d_a_c_d2_clkm, CLK_SOURCE_HDMI, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

442

CLK_8_1(0, "pc_emc_2x", mux_m_c_p_clkm_mud_c2_c3_cud, CLK_SOURCE_EMC, DCF_IS_EMC),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

444

CLK_8_1(0, "pc_vi_sensor", mux_m_c2_c_c3_p_N_a, CLK_SOURCE_VI_SENSOR, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

445

CLK_8_1(0, "pc_spi4", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_SPI4, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

447

CLK_8_1(0, "pc_sdmmc3", mux_p_c2_c_c3_m_e_clkm, CLK_SOURCE_SDMMC3, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

449

CLK_8_1(0, "pc_vde", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_VDE, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

450

CLK_8_1(0, "pc_owr", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_OWR, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

451

CLK_8_1(0, "pc_snor", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_NOR, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

452

CLK_8_1(0, "pc_csite", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_CSITE, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

453

CLK_8_1(0, "pc_i2s0", mux_a_N_audio0_N_p_N_clkm, CLK_SOURCE_I2S0, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

455

CLK_8_1(0, "pc_msenc", mux_m_c2_c_c3_p_N_a, CLK_SOURCE_MSENC, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

456

CLK_8_1(0, "pc_tsec", mux_p_c2_c_c3_m_a_clkm, CLK_SOURCE_TSEC, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

459

CLK_8_1(0, "pc_mselect", mux_p_c2_c_c3_m_clks_clkm, CLK_SOURCE_MSELECT, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

460

CLK_8_1(0, "pc_tsensor", mux_p_c2_c_c3_clkm_N_clks, CLK_SOURCE_TSENSOR, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

461

CLK_8_1(0, "pc_i2s3", mux_a_N_audio3_N_p_N_clkm, CLK_SOURCE_I2S3, DCF_HAVE_ENA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

462

CLK_8_1(0, "pc_i2s4", mux_a_N_audio4_N_p_N_clkm, CLK_SOURCE_I2S4, DCF_HAVE_ENA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

464

CLK_8_1(0, "pc_spi5", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_SPI5, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

465

CLK_8_1(0, "pc_spi6", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_SPI6, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

466

CLK_8_1(0, "pc_audio", mux_sep_audio, CLK_SOURCE_AUDIO, DCF_IS_AUDIO),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

467

CLK_8_1(0, "pc_dam0", mux_sep_audio, CLK_SOURCE_DAM0, DCF_IS_AUDIO),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

468

CLK_8_1(0, "pc_dam1", mux_sep_audio, CLK_SOURCE_DAM1, DCF_IS_AUDIO),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

469

CLK_8_1(0, "pc_dam2", mux_sep_audio, CLK_SOURCE_DAM2, DCF_IS_AUDIO),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

470

CLK_8_1(0, "pc_hda2codec_2x", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_HDA2CODEC_2X, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

471

CLK_8_1(0, "pc_actmon", mux_p_c2_c_c3_clks_N_clkm, CLK_SOURCE_ACTMON, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

472

CLK_8_1(0, "pc_extperiph1", mux_a_clks_p_clkm_e, CLK_SOURCE_EXTPERIPH1, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

473

CLK_8_1(0, "pc_extperiph2", mux_a_clks_p_clkm_e, CLK_SOURCE_EXTPERIPH2, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

474

CLK_8_1(0, "pc_extperiph3", mux_a_clks_p_clkm_e, CLK_SOURCE_EXTPERIPH3, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

475

CLK_8_1(0, "pc_i2c_slow", mux_p_c2_c_c3_clks_N_clkm, CLK_SOURCE_I2C_SLOW, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

477

CLK_8_1(0, "pc_sor0", mux_p_m_d_a_c_d2_clkm, CLK_SOURCE_SOR0, DCF_IS_SOR0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

478

CLK_8_1(0, "pc_sata_oob", mux_p_N_c_N_m_N_clkm, CLK_SOURCE_SATA_OOB, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

479

CLK_8_1(0, "pc_sata", mux_p_N_c_N_m_N_clkm, CLK_SOURCE_SATA, DCF_IS_SATA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

480

CLK_8_1(0, "pc_hda", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_HDA, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

481

CLK_8_1(TEGRA124_CLK_XUSB_HOST_SRC,

sys/arm/nvidia/tegra124/tegra124_clk_per.c

483

CLK_8_1(TEGRA124_CLK_XUSB_FALCON_SRC,

sys/arm/nvidia/tegra124/tegra124_clk_per.c

485

CLK_8_1(TEGRA124_CLK_XUSB_FS_SRC,

sys/arm/nvidia/tegra124/tegra124_clk_per.c

487

CLK_8_1(TEGRA124_CLK_XUSB_DEV_SRC,

sys/arm/nvidia/tegra124/tegra124_clk_per.c

489

CLK_8_1(TEGRA124_CLK_XUSB_SS_SRC,

sys/arm/nvidia/tegra124/tegra124_clk_per.c

491

CLK_8_1(0, "pc_cilab", mux_p_N_c_N_N_N_clkm, CLK_SOURCE_CILAB, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

492

CLK_8_1(0, "pc_cilcd", mux_p_N_c_N_N_N_clkm, CLK_SOURCE_CILCD, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

493

CLK_8_1(0, "pc_cile", mux_p_N_c_N_N_N_clkm, CLK_SOURCE_CILE, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

494

CLK_8_1(0, "pc_dsia_lp", mux_p_N_c_N_N_N_clkm, CLK_SOURCE_DSIA_LP, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

495

CLK_8_1(0, "pc_dsib_lp", mux_p_N_c_N_N_N_clkm, CLK_SOURCE_DSIB_LP, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

496

CLK_8_1(0, "pc_entropy", mux_p_clkm_clks_E, CLK_SOURCE_ENTROPY, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

497

CLK_8_1(0, "pc_dvfs_ref", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_DVFS_REF, DCF_HAVE_ENA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

498

CLK_8_1(0, "pc_dvfs_soc", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_DVFS_SOC, DCF_HAVE_ENA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

499

CLK_8_1(0, "pc_traceclkin", mux_p_c2_c_c3_m_N_clkm, CLK_SOURCE_TRACECLKIN, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

500

CLK_8_1(0, "pc_adx", mux_a_c2_c_c3_p_N_clkm, CLK_SOURCE_ADX, DCF_HAVE_ENA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

501

CLK_8_1(0, "pc_amx", mux_a_c2_c_c3_p_N_clkm, CLK_SOURCE_AMX, DCF_HAVE_ENA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

502

CLK_8_1(0, "pc_emc_latency", mux_m_c_p_clkm_mud_c2_c3, CLK_SOURCE_EMC_LATENCY, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

503

CLK_8_1(0, "pc_soc_therm", mux_m_c_p_a_c2_c3, CLK_SOURCE_SOC_THERM, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

504

CLK_8_1(0, "pc_vi_sensor2", mux_m_c2_c_c3_p_N_a, CLK_SOURCE_VI_SENSOR2, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

506

CLK_8_1(0, "pc_emc_dll", mux_m_c_p_clkm_mud_c2_c3, CLK_SOURCE_EMC_DLL, DCF_IS_EMC_DLL),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

507

CLK_8_1(0, "pc_hdmi_audio", mux_p_c_c2_clkm, CLK_SOURCE_HDMI_AUDIO, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

508

CLK_8_1(0, "pc_clk72mhz", mux_p_c_c2_clkm, CLK_SOURCE_CLK72MHZ, 0),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

509

CLK_8_1(0, "pc_adx1", mux_a_c2_c_c3_p_N_clkm, CLK_SOURCE_ADX1, DCF_HAVE_ENA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

510

CLK_8_1(0, "pc_amx1", mux_a_c2_c_c3_p_N_clkm, CLK_SOURCE_AMX1, DCF_HAVE_ENA),

sys/arm/nvidia/tegra124/tegra124_clk_per.c

511

CLK_8_1(0, "pc_vic", mux_m_c_p_a_c2_c3_clkm, CLK_SOURCE_VIC, DCF_IS_VIC),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

530

CLK_8_1(0, "pc_i2s2", mux_a_N_audio1_N_p_N_clkm, CLK_SOURCE_I2S2, DCF_HAVE_ENA),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

531

CLK_8_1(0, "pc_i2s3", mux_a_N_audio2_N_p_N_clkm, CLK_SOURCE_I2S3, DCF_HAVE_ENA),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

532

CLK_8_1(0, "pc_spdif_out", mux_a_N_audio_N_p_N_clkm, CLK_SOURCE_SPDIF_OUT, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

533

CLK_8_1(0, "pc_spdif_in", mux_p_c2_c_c4_clkm_c4o1_c4o2, CLK_SOURCE_SPDIF_IN, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

534

CLK_8_1(0, "pc_pwm", mux_p_c2_c_c4_clks_c4o1_clkm_c4o2, CLK_SOURCE_PWM, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

535

CLK_8_1(0, "pc_spi2", mux_p_c2_c_c4_N_c4o1_clkm_c4o2, CLK_SOURCE_SPI2, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

536

CLK_8_1(0, "pc_spi3", mux_p_c2_c_c4_N_c4o1_clkm_c4o2, CLK_SOURCE_SPI3, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

539

CLK_8_1(0, "pc_spi1", mux_p_c2_c_c4_N_c4o1_clkm_c4o2, CLK_SOURCE_SPI1, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

542

CLK_8_1(0, "pc_isp", mux_N_c_p_a1_c2_c3_clkm_c4, CLK_SOURCE_ISP, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

543

CLK_8_1(0, "pc_vi", mux_N_c2_c_c3_p_clkm_a1_c4, CLK_SOURCE_VI, DCF_IS_VI),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

544

CLK_8_1(0, "pc_sdmmc1", mux_p_N_N_c4o2_c4o1_N_clkm_c4, CLK_SOURCE_SDMMC1, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

545

CLK_8_1(0, "pc_sdmmc2", mux_p_N_N_c4o2_c4o1_N_clkm_c4, CLK_SOURCE_SDMMC2, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

546

CLK_8_1(0, "pc_sdmmc4", mux_p_N_N_c4o2_c4o1_N_clkm_c4, CLK_SOURCE_SDMMC4, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

549

CLK_8_1(0, "pc_host1x", mux_c4o1_c2_c_c4_p_clkm_a_c4, CLK_SOURCE_HOST1X, DCF_IS_HOST1X),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

551

CLK_8_1(0, "pc_emc", mux_m_c_p_clkm_mud_mbud_mb_pud, CLK_SOURCE_EMC, DCF_IS_EMC),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

553

CLK_8_1(0, "pc_vi_sensor", mux_N_c2_c_c3_p_N_a, CLK_SOURCE_VI_SENSOR, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

554

CLK_8_1(0, "pc_spi4", mux_p_c2_c_c4_N_c4o1_clkm_c4o2, CLK_SOURCE_SPI4, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

556

CLK_8_1(0, "pc_sdmmc3", mux_p_c2_c_c3_m_e_clkm, CLK_SOURCE_SDMMC3, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

558

CLK_8_1(0, "pc_csite", mux_p_c2_refe1_c3_m_a1_clkm_C4, CLK_SOURCE_CSITE, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

559

CLK_8_1(0, "pc_i2s1", mux_a_N_audio0_N_p_N_clkm, CLK_SOURCE_I2S1, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

561

CLK_8_1(0, "pc_tsec", mux_p_c2_c_c3_N_a1_clkm_c4, CLK_SOURCE_TSEC, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

563

CLK_8_1(0, "pc_mselect", mux_p_c2_c_c4o2_c4o1_clks_clkm_c4, CLK_SOURCE_MSELECT, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

564

CLK_8_1(0, "pc_tsensor", mux_p_c2_c_c4_clkm_c4o1_clks_c4o2, CLK_SOURCE_TSENSOR, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

565

CLK_8_1(0, "pc_i2s4", mux_a_N_audio3_N_p_N_clkm, CLK_SOURCE_I2S3, DCF_HAVE_ENA),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

566

CLK_8_1(0, "pc_i2s5", mux_a_N_audio4_N_p_N_clkm, CLK_SOURCE_I2S4, DCF_HAVE_ENA),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

568

CLK_8_1(0, "pc_ahub", mux_sep_audio, CLK_SOURCE_AHUB, DCF_IS_AHUB),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

569

CLK_8_1(0, "pc_hda2codec_2x", mux_p_c2_c_c4_a_c4o1_clkm_c4o2, CLK_SOURCE_HDA2CODEC_2X, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

570

CLK_8_1(0, "pc_actmon", mux_p_c2_c_c4_clks_c4o1_clkm_c4o2, CLK_SOURCE_ACTMON, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

571

CLK_8_1(0, "pc_extperiph1", mux_a_clks_p_clkm_e, CLK_SOURCE_EXTPERIPH1, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

572

CLK_8_1(0, "pc_extperiph2", mux_a_clks_p_clkm_e, CLK_SOURCE_EXTPERIPH2, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

573

CLK_8_1(0, "pc_extperiph3", mux_a_clks_p_clkm_e, CLK_SOURCE_EXTPERIPH3, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

574

CLK_8_1(0, "pc_i2c_slow", mux_p_c2_c_c4_clks_c4o1_clkm_c4o2, CLK_SOURCE_I2C_SLOW, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

576

CLK_8_1(0, "pc_ispb", mux_N_N_c_N_p_N_a, CLK_SOURCE_ISPB, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

577

CLK_8_1(0, "pc_sor1", mux_p_N_d_N_N_d2_clkm, CLK_SOURCE_SOR1, DCF_IS_SOR0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

578

CLK_8_1(0, "pc_sor0", mux_p_m_d_a_c_d2_clkm, CLK_SOURCE_SOR0, DCF_IS_SOR0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

579

CLK_8_1(0, "pc_sata_oob", mux_p_c4_c_c4o1_N_c4o2_clkm, CLK_SOURCE_SATA_OOB, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

580

CLK_8_1(0, "pc_sata", mux_p_N_c_c4_N_c4o1_clkm_c4o2, CLK_SOURCE_SATA, DCF_IS_SATA),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

581

CLK_8_1(0, "pc_hda", mux_p_c2_c_c4_N_c4o1_clkm_c4o2, CLK_SOURCE_HDA, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

582

CLK_8_1(TEGRA210_CLK_XUSB_HOST_SRC,

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

584

CLK_8_1(TEGRA210_CLK_XUSB_FALCON_SRC,

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

586

CLK_8_1(TEGRA210_CLK_XUSB_FS_SRC,

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

588

CLK_8_1(TEGRA210_CLK_XUSB_DEV_SRC,

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

590

CLK_8_1(TEGRA210_CLK_XUSB_SS_SRC,

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

592

CLK_8_1(0, "pc_cilab", mux_p_N_c_c4_c4o1_c4o2_clkm, CLK_SOURCE_CILAB, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

593

CLK_8_1(0, "pc_cilcd", mux_p_N_c_c4_c4o1_c4o2_clkm, CLK_SOURCE_CILCD, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

594

CLK_8_1(0, "pc_cilef", mux_p_N_c_c4_c4o1_c4o2_clkm, CLK_SOURCE_CILEF, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

595

CLK_8_1(0, "pc_dsia_lp", mux_p_N_c_c4_c4o1_c4o2_clkm, CLK_SOURCE_DSIA_LP, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

596

CLK_8_1(0, "pc_dsib_lp", mux_p_N_c_c4_c4o1_c4o2_clkm, CLK_SOURCE_DSIB_LP, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

597

CLK_8_1(0, "pc_entropy", mux_p_N_clkm_N_clks_N_E, CLK_SOURCE_ENTROPY, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

598

CLK_8_1(0, "pc_dvfs_ref", mux_p_c2_c_c4_N_c4o1_clkm_c4o2, CLK_SOURCE_DVFS_REF, DCF_HAVE_ENA),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

599

CLK_8_1(0, "pc_dvfs_soc", mux_p_c2_c_c4_N_c4o1_clkm_c4o2, CLK_SOURCE_DVFS_SOC, DCF_HAVE_ENA),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

600

CLK_8_1(0, "pc_emc_latency", mux_N_c_p_clkm_N_c4_c4o1_c4o2, CLK_SOURCE_EMC_LATENCY, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

601

CLK_8_1(0, "pc_soc_therm", mux_N_c_p_clkm_N_c4_c4o1_c4o1, CLK_SOURCE_SOC_THERM, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

602

CLK_8_1(0, "pc_dmic1", mux_a_audiod1_p_clkm, CLK_SOURCE_DMIC1, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

603

CLK_8_1(0, "pc_dmic2", mux_a_audiod2_p_clkm, CLK_SOURCE_DMIC2, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

604

CLK_8_1(0, "pc_vi_sensor2", mux_N_c2_c_c3_p_N_a, CLK_SOURCE_VI_SENSOR2, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

607

CLK_8_1(0, "pc_emc_dll", mux_m_c_p_clkm_mud_mbud_mb_pud, CLK_SOURCE_EMC_DLL, DCF_IS_EMC_DLL),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

608

CLK_8_1(0, "pc_uart_fst_mipi_cal", mux_p_c_c2_N_c2_N_clkm, CLK_SOURCE_UART_FST_MIPI_CAL, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

609

CLK_8_1(0, "pc_vic", mux_N_c_p_a1_c2_c3_clkm, CLK_SOURCE_VIC, DCF_IS_VIC),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

611

CLK_8_1(0, "pc_sdmmc_legacy_tm", mux_po3_c_c2_clkm_p_c4_c4o1_c4o2, CLK_SOURCE_SDMMC_LEGACY_TM, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

612

CLK_8_1(0, "pc_nvdec", mux_N_c2_c_c3_p_N_a1_clkm, CLK_SOURCE_NVDEC, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

613

CLK_8_1(0, "pc_nvjpg", mux_N_c2_c_c3_p_N_a1_clkm, CLK_SOURCE_NVJPG, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

614

CLK_8_1(0, "pc_nvenc", mux_N_c2_c_c3_p_N_a1_clkm, CLK_SOURCE_NVENC, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

615

CLK_8_1(0, "pc_dmic3", mux_a_audiod3_p_clkm, CLK_SOURCE_DMIC3, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

616

CLK_8_1(0, "pc_ape", mux_a_c4_c_c4o1_p_N_clkm_c4o2, CLK_SOURCE_APE, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

617

CLK_8_1(0, "pc_qspi", mux_p_co1_c_N_c4o2_c4o1_clkm_c4, CLK_SOURCE_QSPI, DCF_IS_QSPI),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

618

CLK_8_1(0, "pc_vi_i2c", mux_p_c2_c_c3_N_N_clkm, CLK_SOURCE_VI_I2C, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

621

CLK_8_1(0, "pc_tsecb", mux_p_c2_c_c3_N_a1_clkm_c4, CLK_SOURCE_TSECB, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

622

CLK_8_1(0, "pc_uartape", mux_p_c2_c_c3_N_N_clkm, CLK_SOURCE_UARTAPE, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

623

CLK_8_1(0, "pc_dbgapb", mux_N_N_p_N_N_N_clkm, CLK_SOURCE_DBGAPB, 0),

sys/arm64/nvidia/tegra210/tegra210_clk_per.c

624

CLK_8_1(0, "pc_emc_safe", mux_m_c_p_clkm_mud_mbud_mb_pud, CLK_SOURCE_EMC_SAFE, DCF_IS_EMC_SAFE),