sys/dev/dpaa2/dpaa2_io.c

567

dpaa2_swp_write_reg(sc->swp, DPAA2_SWP_CINH_DCAP, idx);

sys/dev/dpaa2/dpaa2_io.c

579

dpaa2_swp_write_reg(sc->swp, DPAA2_SWP_CINH_IIR, 0);

sys/dev/dpaa2/dpaa2_swp.c

1032

dpaa2_swp_write_reg(swp, DPAA2_SWP_CINH_VDQCR_RT,

sys/dev/dpaa2/dpaa2_swp.c

1114

dpaa2_swp_write_reg(swp, DPAA2_SWP_CINH_CR_RT,

sys/dev/dpaa2/dpaa2_swp.c

271

dpaa2_swp_write_reg(p, DPAA2_SWP_CINH_CFG, reg);

sys/dev/dpaa2/dpaa2_swp.c

284

dpaa2_swp_write_reg(p, DPAA2_SWP_CINH_SDQCR, 0);

sys/dev/dpaa2/dpaa2_swp.c

397

dpaa2_swp_write_reg(swp, DPAA2_SWP_CINH_IER, mask);

sys/dev/dpaa2/dpaa2_swp.c

429

dpaa2_swp_write_reg(swp, DPAA2_SWP_CINH_ISR, mask);

sys/dev/dpaa2/dpaa2_swp.c

461

dpaa2_swp_write_reg(swp, DPAA2_SWP_CINH_SDQCR, dqsrc != 0

sys/dev/dpaa2/dpaa2_swp.c

495

dpaa2_swp_write_reg(swp, DPAA2_SWP_CINH_DQRR_ITR, threshold);

sys/dev/dpaa2/dpaa2_swp.c

496

dpaa2_swp_write_reg(swp, DPAA2_SWP_CINH_ITPR, itp);

sys/dev/dpaa2/dpaa2_swp.c

979

dpaa2_swp_write_reg(swp, DPAA2_SWP_CINH_RCR_AM_RT +

sys/dev/dpaa2/dpaa2_swp.h

452

void dpaa2_swp_write_reg(struct dpaa2_swp *swp, uint32_t o, uint32_t v);