dpaa2_swp
struct dpaa2_swp *swp = sc->swp;
struct dpaa2_swp *swp;
struct dpaa2_swp *swp = iosc->swp;
dpaa2_swp_exec_vdc_command_locked(struct dpaa2_swp *swp,
dpaa2_swp_exec_mgmt_command(struct dpaa2_swp *swp, struct dpaa2_swp_cmd *cmd,
dpaa2_swp_send_mgmt_command(struct dpaa2_swp *swp, struct dpaa2_swp_cmd *cmd,
dpaa2_swp_wait_for_mgmt_response(struct dpaa2_swp *swp, struct dpaa2_swp_rsp *rsp)
static int dpaa2_swp_exec_mgmt_command(struct dpaa2_swp *,
static int dpaa2_swp_exec_br_command(struct dpaa2_swp *, struct dpaa2_swp_cmd *,
static int dpaa2_swp_exec_vdc_command_locked(struct dpaa2_swp *,
static int dpaa2_swp_send_mgmt_command(struct dpaa2_swp *,
static int dpaa2_swp_wait_for_mgmt_response(struct dpaa2_swp *,
dpaa2_swp_init_portal(struct dpaa2_swp **swp, struct dpaa2_swp_desc *desc,
struct dpaa2_swp *p;
p = malloc(sizeof(struct dpaa2_swp), M_DPAA2_SWP,
dpaa2_swp_free_portal(struct dpaa2_swp *swp)
dpaa2_swp_write_reg(struct dpaa2_swp *swp, uint32_t o, uint32_t v)
dpaa2_swp_read_reg(struct dpaa2_swp *swp, uint32_t o)
dpaa2_swp_set_intr_trigger(struct dpaa2_swp *swp, uint32_t mask)
dpaa2_swp_get_intr_trigger(struct dpaa2_swp *swp)
dpaa2_swp_read_intr_status(struct dpaa2_swp *swp)
dpaa2_swp_clear_intr_status(struct dpaa2_swp *swp, uint32_t mask)
dpaa2_swp_set_push_dequeue(struct dpaa2_swp *swp, uint8_t chan_idx, bool en)
int dpaa2_swp_set_irq_coalescing(struct dpaa2_swp *swp, uint32_t threshold,
dpaa2_swp_conf_wq_channel(struct dpaa2_swp *swp, uint16_t chan_id,
dpaa2_swp_query_bp(struct dpaa2_swp *swp, uint16_t bpid,
dpaa2_swp_release_bufs(struct dpaa2_swp *swp, uint16_t bpid, bus_addr_t *buf,
dpaa2_swp_dqrr_next_locked(struct dpaa2_swp *swp, struct dpaa2_dq *dq,
dpaa2_swp_pull(struct dpaa2_swp *swp, uint16_t chan_id, struct dpaa2_buf *buf,
dpaa2_swp_enq(struct dpaa2_swp *swp, struct dpaa2_eq_desc *ed,
dpaa2_swp_enq_mult(struct dpaa2_swp *swp, struct dpaa2_eq_desc *ed,
dpaa2_swp_exec_br_command(struct dpaa2_swp *swp, struct dpaa2_swp_cmd *cmd,
int dpaa2_swp_init_portal(struct dpaa2_swp **swp, struct dpaa2_swp_desc *desc,
void dpaa2_swp_free_portal(struct dpaa2_swp *swp);
void dpaa2_swp_write_reg(struct dpaa2_swp *swp, uint32_t o, uint32_t v);
uint32_t dpaa2_swp_read_reg(struct dpaa2_swp *swp, uint32_t o);
void dpaa2_swp_set_intr_trigger(struct dpaa2_swp *swp, uint32_t mask);
uint32_t dpaa2_swp_get_intr_trigger(struct dpaa2_swp *swp);
uint32_t dpaa2_swp_read_intr_status(struct dpaa2_swp *swp);
void dpaa2_swp_clear_intr_status(struct dpaa2_swp *swp, uint32_t mask);
void dpaa2_swp_set_push_dequeue(struct dpaa2_swp *swp, uint8_t chan_idx,
int dpaa2_swp_set_irq_coalescing(struct dpaa2_swp *swp, uint32_t threshold,
int dpaa2_swp_conf_wq_channel(struct dpaa2_swp *swp, uint16_t chan_id,
int dpaa2_swp_query_bp(struct dpaa2_swp *swp, uint16_t bpid,
int dpaa2_swp_release_bufs(struct dpaa2_swp *swp, uint16_t bpid, bus_addr_t *buf,
int dpaa2_swp_dqrr_next_locked(struct dpaa2_swp *swp, struct dpaa2_dq *dq,
int dpaa2_swp_pull(struct dpaa2_swp *swp, uint16_t chan_id,
int dpaa2_swp_enq(struct dpaa2_swp *swp, struct dpaa2_eq_desc *ed,
int dpaa2_swp_enq_mult(struct dpaa2_swp *swp, struct dpaa2_eq_desc *ed,