doorbell
int auto_queue, dir, doorbell, doorbell_mode_switch, ee_mask, event_ring, lpm_notify, num, num_elements, offload_channel, pollcfg;
vm_offset_t doorbell;
bus_space_barrier(db_bar->tag, db_bar->handle, ring->doorbell, 4,
bus_space_write_4(db_bar->tag, db_bar->handle, ring->doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, ring->doorbell, 4,
bus_space_write_4(db_bar->tag, db_bar->handle, ring->doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, cpr->ring.doorbell, 4,
bus_space_write_4(db_bar->tag, db_bar->handle, cpr->ring.doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, ring->doorbell, 8,
bus_space_write_8(db_bar->tag, db_bar->handle, ring->doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, ring->doorbell, 8,
bus_space_write_8(db_bar->tag, db_bar->handle, ring->doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, cpr->ring.doorbell, 8,
bus_space_write_8(db_bar->tag, db_bar->handle, cpr->ring.doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, cpr->ring.doorbell, 8,
bus_space_write_8(db_bar->tag, db_bar->handle, cpr->ring.doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, cpr->ring.doorbell, 8,
bus_space_write_8(db_bar->tag, db_bar->handle, cpr->ring.doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, ring->doorbell, 8,
bus_space_write_8(db_bar->tag, db_bar->handle, ring->doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, ring->doorbell, 8,
bus_space_write_8(db_bar->tag, db_bar->handle, ring->doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, cpr->ring.doorbell, 8,
bus_space_write_8(db_bar->tag, db_bar->handle, cpr->ring.doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, cpr->ring.doorbell, 8,
bus_space_write_8(db_bar->tag, db_bar->handle, cpr->ring.doorbell,
bus_space_barrier(db_bar->tag, db_bar->handle, cpr->ring.doorbell, 8,
bus_space_write_8(db_bar->tag, db_bar->handle, cpr->ring.doorbell,
softc->def_cp_ring.ring.doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
softc->tx_cp_rings[i].ring.doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
softc->tx_rings[i].doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
softc->nq_rings[i].ring.doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
softc->rx_cp_rings[i].ring.doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
softc->rx_rings[i].doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
softc->ag_rings[i].doorbell = (BNXT_CHIP_P5_PLUS(softc)) ?
uint32_t doorbell;
gd->doorbell = INVALID_DOORBELL;
gd->doorbell = resp.db_id;
gd->pdid, gd->gpa_mkey, gd->doorbell);
gd->doorbell = INVALID_DOORBELL;
req.doolbell_id = queue->gdma_dev->doorbell;
mana_gd_ring_doorbell(gc, queue->gdma_dev->doorbell, queue->type,
mana_gd_ring_doorbell(gc, cq->gdma_dev->doorbell, cq->type, cq->id,
mana_gd_ring_doorbell(gc, eq->gdma_dev->doorbell, eq->type, eq->id,
gd->doorbell = eq_db.doorbell;
gd->doorbell = INVALID_DOORBELL;
hwc->gdma_dev->doorbell = INVALID_DOORBELL;
uint32_t doorbell: 16;
err = mana_cfg_vport(apc, gd->pdid, gd->doorbell);
__be32 doorbell[2];
doorbell[0] = cpu_to_be32(sn << 28 | cmd | cq->cqn);
doorbell[1] = cpu_to_be32(ci);
mlx4_write64(doorbell, uar_page + MLX4_CQ_DOORBELL, doorbell_lock);
void __iomem *doorbell;
eq->doorbell = mlx4_get_eq_uar(dev, eq);
eq->doorbell);
if (!eq->doorbell) {
__be32 doorbell[2];
doorbell[0] = cpu_to_be32(sn << 28 | cmd | ci);
doorbell[1] = cpu_to_be32(cq->cqn);
mlx5_write64(doorbell, uar_page + MLX5_CQ_DOORBELL, doorbell_lock);
__be32 __iomem *doorbell;
__be32 __iomem *addr = eq->doorbell + (arm ? 0 : 2);
eq->doorbell = priv->uar->map + MLX5_EQ_DOORBEL_OFFSET;
if (unlikely((force == false && sq->db_inhibit != 0) || sq->doorbell.d64 == 0)) {
mlx5_write64(sq->doorbell.d32, sq->uar_map,
sq->doorbell.d64 = 0;
} doorbell;
} doorbell;
memcpy(sq->doorbell.d32, &wqe->ctrl, sizeof(sq->doorbell.d32));
memcpy(sq->doorbell.d32, &wqe->ctrl, sizeof(sq->doorbell.d32));
memcpy(sq->doorbell.d32, &wqe->ctrl, sizeof(sq->doorbell.d32));
memcpy(iq->doorbell.d32, &wqe->ctrl, sizeof(iq->doorbell.d32));
memcpy(iq->doorbell.d32, &wqe->ctrl, sizeof(iq->doorbell.d32));
memcpy(iq->doorbell.d32, &wqe->ctrl, sizeof(iq->doorbell.d32));
memcpy(iq->doorbell.d32, &wqe->ctrl, sizeof(iq->doorbell.d32));
if (unlikely(iq->db_inhibit != 0 || iq->doorbell.d64 == 0))
mlx5_write64(iq->doorbell.d32, iq->uar_map,
iq->doorbell.d64 = 0;
sq->doorbell.d32[0] = cpu_to_be32(MLX5_OPCODE_NOP);
sq->doorbell.d32[1] = cpu_to_be32(sq->sqn << 8);
memcpy(iq->doorbell.d32, &wqe->ctrl, sizeof(iq->doorbell.d32));
memcpy(sq->doorbell.d32, wqe_last, sizeof(sq->doorbell.d32));
memcpy(sq->doorbell.d32, &wqe->ctrl, sizeof(sq->doorbell.d32));
memcpy(sq->doorbell.d32, &wqe->ctrl, sizeof(sq->doorbell.d32));
struct mlx5_db *doorbell;
struct mlx5_db *doorbell;
sq->doorbell = &qp->db;
rq->doorbell = &qp->db;
struct mlx5_ifc_nodnic_ring_doorbell_bits doorbell;
u32 doorbell;
doorbell = mpr_regread(sc, MPI2_DOORBELL_OFFSET);
if ((doorbell & MPI2_IOC_STATE_MASK) ==
"fault_state(0x%04x)!\n", doorbell);
u32 doorbell;
doorbell = mps_regread(sc, MPI2_DOORBELL_OFFSET);
if ((doorbell & MPI2_IOC_STATE_MASK) ==
"fault_state(0x%04x)!\n", doorbell);
mrsas_write_reg(sc, offsetof(mrsas_reg_set, doorbell),
mrsas_write_reg(sc, offsetof(mrsas_reg_set, doorbell),
mrsas_write_reg(sc, offsetof(mrsas_reg_set, doorbell), MFI_RESET_FLAGS);
if (mrsas_read_reg_with_retries(sc, offsetof(mrsas_reg_set, doorbell)) & 1)
mrsas_write_reg(sc, offsetof(mrsas_reg_set, doorbell),
mrsas_read_reg(sc, offsetof(mrsas_reg_set, doorbell));
u_int32_t doorbell; /* 0000h */
} doorbell[1];
(rman_get_size(ctrlr->resource) - nvme_mmio_offsetof(doorbell[0])) /
qpair->sq_tdbl_off = nvme_mmio_offsetof(doorbell[0]) +
qpair->cq_hdbl_off = nvme_mmio_offsetof(doorbell[0]) +
#define NVME_DOORBELL_OFFSET offsetof(struct nvme_registers, doorbell)