Symbol: cpuinfo
crypto/openssl/apps/version.c
111
dirty = cpuinfo = 1;
crypto/openssl/apps/version.c
120
= dir = engdir = moddir = cpuinfo
crypto/openssl/apps/version.c
157
if (cpuinfo)
crypto/openssl/apps/version.c
64
int engdir = 0, moddir = 0, cpuinfo = 0;
sys/arm/arm/busdma_machdep.c
66
#define BUSDMA_DCACHE_ALIGN cpuinfo.dcache_line_size
sys/arm/arm/busdma_machdep.c
67
#define BUSDMA_DCACHE_MASK cpuinfo.dcache_line_mask
sys/arm/arm/cpuinfo.c
104
cpuinfo.midr = cp15_midr_get();
sys/arm/arm/cpuinfo.c
106
if ((cpuinfo.midr & CPU_ID_IMPLEMENTOR_MASK) == CPU_ID_ARM_LTD) {
sys/arm/arm/cpuinfo.c
107
if (CPU_ID_ISOLD(cpuinfo.midr)) {
sys/arm/arm/cpuinfo.c
109
cpuinfo.midr = 0;
sys/arm/arm/cpuinfo.c
112
if (CPU_ID_IS7(cpuinfo.midr)) {
sys/arm/arm/cpuinfo.c
113
if ((cpuinfo.midr & (1 << 23)) == 0) {
sys/arm/arm/cpuinfo.c
115
cpuinfo.midr = 0;
sys/arm/arm/cpuinfo.c
119
cpuinfo.architecture = 1;
sys/arm/arm/cpuinfo.c
120
cpuinfo.revision = (cpuinfo.midr >> 16) & 0x7F;
sys/arm/arm/cpuinfo.c
123
cpuinfo.architecture = (cpuinfo.midr >> 16) & 0x0F;
sys/arm/arm/cpuinfo.c
124
cpuinfo.revision = (cpuinfo.midr >> 20) & 0x0F;
sys/arm/arm/cpuinfo.c
128
cpuinfo.architecture = (cpuinfo.midr >> 16) & 0x0F;
sys/arm/arm/cpuinfo.c
129
cpuinfo.revision = (cpuinfo.midr >> 20) & 0x0F;
sys/arm/arm/cpuinfo.c
132
cpuinfo.implementer = (cpuinfo.midr >> 24) & 0xFF;
sys/arm/arm/cpuinfo.c
133
cpuinfo.part_number = (cpuinfo.midr >> 4) & 0xFFF;
sys/arm/arm/cpuinfo.c
134
cpuinfo.patch = cpuinfo.midr & 0x0F;
sys/arm/arm/cpuinfo.c
137
cpuinfo.ctr = cp15_ctr_get();
sys/arm/arm/cpuinfo.c
138
cpuinfo.tcmtr = cp15_tcmtr_get();
sys/arm/arm/cpuinfo.c
139
cpuinfo.tlbtr = cp15_tlbtr_get();
sys/arm/arm/cpuinfo.c
140
cpuinfo.mpidr = cp15_mpidr_get();
sys/arm/arm/cpuinfo.c
141
cpuinfo.revidr = cp15_revidr_get();
sys/arm/arm/cpuinfo.c
144
if (cpuinfo.architecture != 0xF)
sys/arm/arm/cpuinfo.c
146
cpuinfo.id_pfr0 = cp15_id_pfr0_get();
sys/arm/arm/cpuinfo.c
147
cpuinfo.id_pfr1 = cp15_id_pfr1_get();
sys/arm/arm/cpuinfo.c
148
cpuinfo.id_dfr0 = cp15_id_dfr0_get();
sys/arm/arm/cpuinfo.c
149
cpuinfo.id_afr0 = cp15_id_afr0_get();
sys/arm/arm/cpuinfo.c
150
cpuinfo.id_mmfr0 = cp15_id_mmfr0_get();
sys/arm/arm/cpuinfo.c
151
cpuinfo.id_mmfr1 = cp15_id_mmfr1_get();
sys/arm/arm/cpuinfo.c
152
cpuinfo.id_mmfr2 = cp15_id_mmfr2_get();
sys/arm/arm/cpuinfo.c
153
cpuinfo.id_mmfr3 = cp15_id_mmfr3_get();
sys/arm/arm/cpuinfo.c
154
cpuinfo.id_isar0 = cp15_id_isar0_get();
sys/arm/arm/cpuinfo.c
155
cpuinfo.id_isar1 = cp15_id_isar1_get();
sys/arm/arm/cpuinfo.c
156
cpuinfo.id_isar2 = cp15_id_isar2_get();
sys/arm/arm/cpuinfo.c
157
cpuinfo.id_isar3 = cp15_id_isar3_get();
sys/arm/arm/cpuinfo.c
158
cpuinfo.id_isar4 = cp15_id_isar4_get();
sys/arm/arm/cpuinfo.c
159
cpuinfo.id_isar5 = cp15_id_isar5_get();
sys/arm/arm/cpuinfo.c
164
if (CPU_CT_FORMAT(cpuinfo.ctr) == CPU_CT_ARMV7) {
sys/arm/arm/cpuinfo.c
165
cpuinfo.ccsidr = cp15_ccsidr_get();
sys/arm/arm/cpuinfo.c
166
cpuinfo.clidr = cp15_clidr_get();
sys/arm/arm/cpuinfo.c
170
if (cpuinfo.revidr == cpuinfo.midr)
sys/arm/arm/cpuinfo.c
171
cpuinfo.revidr = 0;
sys/arm/arm/cpuinfo.c
175
cpuinfo.outermost_shareability = (cpuinfo.id_mmfr0 >> 8) & 0xF;
sys/arm/arm/cpuinfo.c
176
cpuinfo.shareability_levels = (cpuinfo.id_mmfr0 >> 12) & 0xF;
sys/arm/arm/cpuinfo.c
177
cpuinfo.auxiliary_registers = (cpuinfo.id_mmfr0 >> 20) & 0xF;
sys/arm/arm/cpuinfo.c
178
cpuinfo.innermost_shareability = (cpuinfo.id_mmfr0 >> 28) & 0xF;
sys/arm/arm/cpuinfo.c
180
cpuinfo.mem_barrier = (cpuinfo.id_mmfr2 >> 20) & 0xF;
sys/arm/arm/cpuinfo.c
182
cpuinfo.coherent_walk = (cpuinfo.id_mmfr3 >> 20) & 0xF;
sys/arm/arm/cpuinfo.c
183
cpuinfo.maintenance_broadcast =(cpuinfo.id_mmfr3 >> 12) & 0xF;
sys/arm/arm/cpuinfo.c
185
cpuinfo.generic_timer_ext = (cpuinfo.id_pfr1 >> 16) & 0xF;
sys/arm/arm/cpuinfo.c
186
cpuinfo.virtualization_ext = (cpuinfo.id_pfr1 >> 12) & 0xF;
sys/arm/arm/cpuinfo.c
187
cpuinfo.security_ext = (cpuinfo.id_pfr1 >> 4) & 0xF;
sys/arm/arm/cpuinfo.c
189
cpuinfo.mp_ext = (cpuinfo.mpidr >> 31u) & 0x1;
sys/arm/arm/cpuinfo.c
192
if (CPU_CT_FORMAT(cpuinfo.ctr) == CPU_CT_ARMV7) {
sys/arm/arm/cpuinfo.c
193
cpuinfo.dcache_line_size =
sys/arm/arm/cpuinfo.c
194
1 << (CPU_CT_DMINLINE(cpuinfo.ctr) + 2);
sys/arm/arm/cpuinfo.c
195
cpuinfo.icache_line_size =
sys/arm/arm/cpuinfo.c
196
1 << (CPU_CT_IMINLINE(cpuinfo.ctr) + 2);
sys/arm/arm/cpuinfo.c
198
cpuinfo.dcache_line_size =
sys/arm/arm/cpuinfo.c
199
1 << (CPU_CT_xSIZE_LEN(CPU_CT_DSIZE(cpuinfo.ctr)) + 3);
sys/arm/arm/cpuinfo.c
200
cpuinfo.icache_line_size =
sys/arm/arm/cpuinfo.c
201
1 << (CPU_CT_xSIZE_LEN(CPU_CT_ISIZE(cpuinfo.ctr)) + 3);
sys/arm/arm/cpuinfo.c
203
cpuinfo.dcache_line_mask = cpuinfo.dcache_line_size - 1;
sys/arm/arm/cpuinfo.c
204
cpuinfo.icache_line_mask = cpuinfo.icache_line_size - 1;
sys/arm/arm/cpuinfo.c
210
tmp = (cpuinfo.id_isar0 >> 24) & 0xF; /* Divide_instrs */
sys/arm/arm/cpuinfo.c
216
tmp = (cpuinfo.id_pfr0 >> 4) & 0xF; /* State1 */
sys/arm/arm/cpuinfo.c
220
tmp = (cpuinfo.id_pfr0 >> 12) & 0xF; /* State3 */
sys/arm/arm/cpuinfo.c
224
tmp = (cpuinfo.id_mmfr0 >> 0) & 0xF; /* VMSA */
sys/arm/arm/cpuinfo.c
229
tmp = (cpuinfo.id_isar5 >> 4) & 0xF; /* AES */
sys/arm/arm/cpuinfo.c
235
tmp = (cpuinfo.id_isar5 >> 8) & 0xF; /* SHA1 */
sys/arm/arm/cpuinfo.c
239
tmp = (cpuinfo.id_isar5 >> 12) & 0xF; /* SHA2 */
sys/arm/arm/cpuinfo.c
243
tmp = (cpuinfo.id_isar5 >> 16) & 0xF; /* CRC32 */
sys/arm/arm/cpuinfo.c
261
if (cpuinfo.implementer == CPU_IMPLEMENTER_ARM) {
sys/arm/arm/cpuinfo.c
262
switch (cpuinfo.part_number) {
sys/arm/arm/cpuinfo.c
395
if (cpuinfo.implementer == CPU_IMPLEMENTER_ARM) {
sys/arm/arm/cpuinfo.c
396
switch (cpuinfo.part_number) {
sys/arm/arm/cpuinfo.c
445
} else if (cpuinfo.implementer == CPU_IMPLEMENTER_QCOM) {
sys/arm/arm/cpuinfo.c
45
struct cpuinfo cpuinfo =
sys/arm/arm/debug_monitor.c
793
dbg_m = ((cpuinfo.id_dfr0 & ID_DFR0_CP_DEBUG_M_MASK) >>
sys/arm/arm/genassym.c
127
ASSYM(DCACHE_LINE_SIZE, offsetof(struct cpuinfo, dcache_line_size));
sys/arm/arm/genassym.c
128
ASSYM(DCACHE_LINE_MASK, offsetof(struct cpuinfo, dcache_line_mask));
sys/arm/arm/genassym.c
129
ASSYM(ICACHE_LINE_SIZE, offsetof(struct cpuinfo, icache_line_size));
sys/arm/arm/genassym.c
130
ASSYM(ICACHE_LINE_MASK, offsetof(struct cpuinfo, icache_line_mask));
sys/arm/arm/identcpu-v6.c
130
if ((cpuinfo.ctr & CPU_CT_S) == 0)
sys/arm/arm/identcpu-v6.c
136
pcache_type = CPU_CT_CTYPE(cpuinfo.ctr);
sys/arm/arm/identcpu-v6.c
139
isize = CPU_CT_ISIZE(cpuinfo.ctr);
sys/arm/arm/identcpu-v6.c
154
dsize = CPU_CT_DSIZE(cpuinfo.ctr);
sys/arm/arm/identcpu-v6.c
195
CPU_CLIDR_LOUU(cpuinfo.clidr) + 1,
sys/arm/arm/identcpu-v6.c
196
CPU_CLIDR_LOC(cpuinfo.clidr) + 1,
sys/arm/arm/identcpu-v6.c
197
CPU_CLIDR_LOUIS(cpuinfo.clidr) + 1);
sys/arm/arm/identcpu-v6.c
200
type = CPU_CLIDR_CTYPE(cpuinfo.clidr, i);
sys/arm/arm/identcpu-v6.c
284
if (cpu_names[i].implementer == cpuinfo.implementer &&
sys/arm/arm/identcpu-v6.c
285
cpu_names[i].part_number == cpuinfo.part_number) {
sys/arm/arm/identcpu-v6.c
290
cpuinfo.revision, cpuinfo.patch,
sys/arm/arm/identcpu-v6.c
291
cpuinfo.midr != cpuinfo.revidr ?
sys/arm/arm/identcpu-v6.c
292
cpuinfo.revidr : 0);
sys/arm/arm/identcpu-v6.c
298
printf("unknown CPU (ID = 0x%x)\n", cpuinfo.midr);
sys/arm/arm/identcpu-v6.c
304
val = (cpuinfo.mpidr >> 4)& 0xF;
sys/arm/arm/identcpu-v6.c
305
if (cpuinfo.mpidr & (1 << 31U))
sys/arm/arm/identcpu-v6.c
307
val = (cpuinfo.id_pfr0 >> 4)& 0xF;
sys/arm/arm/identcpu-v6.c
313
val = (cpuinfo.id_pfr1 >> 4)& 0xF;
sys/arm/arm/identcpu-v6.c
317
val = (cpuinfo.id_pfr1 >> 12)& 0xF;
sys/arm/arm/identcpu-v6.c
321
val = (cpuinfo.id_pfr1 >> 16)& 0xF;
sys/arm/arm/identcpu-v6.c
325
val = (cpuinfo.id_mmfr0 >> 0)& 0xF;
sys/arm/arm/identcpu-v6.c
336
val = (cpuinfo.id_mmfr3 >> 20)& 0xF;
sys/arm/arm/identcpu-v6.c
346
val = (cpuinfo.id_isar0 >> 24)& 0xF;
sys/arm/arm/identcpu-v6.c
352
val = (cpuinfo.id_isar2 >> 20)& 0xF;
sys/arm/arm/identcpu-v6.c
356
val = (cpuinfo.id_isar2 >> 16)& 0xF;
sys/arm/arm/identcpu-v6.c
360
val = (cpuinfo.id_isar2 >> 12)& 0xF;
sys/arm/arm/identcpu-v6.c
364
val = (cpuinfo.id_isar3 >> 4)& 0xF;
sys/arm/arm/identcpu-v6.c
375
if (CPU_CT_FORMAT(cpuinfo.ctr) == CPU_CT_ARMV7)
sys/arm/arm/pmap-v6.c
441
if (cpuinfo.coherent_walk)
sys/arm/arm/pmap-v6.c
464
if (cpuinfo.coherent_walk) {
sys/arm/arm/sys_machdep.c
70
len += addr & cpuinfo.dcache_line_mask;
sys/arm/arm/sys_machdep.c
71
addr &= ~cpuinfo.dcache_line_mask;
sys/arm/include/cpu.h
445
va &= ~cpuinfo.dcache_line_mask;
sys/arm/include/cpu.h
447
for ( ; va < eva; va += cpuinfo.dcache_line_size) {
sys/arm/include/cpu.h
492
va &= ~cpuinfo.dcache_line_mask;
sys/arm/include/cpu.h
493
for ( ; va < eva; va += cpuinfo.dcache_line_size) {
sys/arm/include/cpu.h
517
va &= ~cpuinfo.dcache_line_mask;
sys/arm/include/cpu.h
518
for ( ; va < eva; va += cpuinfo.dcache_line_size) {
sys/arm/include/cpu.h
541
va &= ~cpuinfo.dcache_line_mask;
sys/arm/include/cpu.h
542
for ( ; va < eva; va += cpuinfo.dcache_line_size) {
sys/arm/include/cpu.h
564
va &= ~cpuinfo.dcache_line_mask;
sys/arm/include/cpu.h
565
for ( ; va < eva; va += cpuinfo.dcache_line_size) {
sys/arm/include/cpu.h
582
va = sva & ~cpuinfo.dcache_line_mask;
sys/arm/include/cpu.h
583
for ( ; va < eva; va += cpuinfo.dcache_line_size) {
sys/arm/include/cpu.h
59
if (cpuinfo.mp_ext != 0) { \
sys/arm/include/cpu.h
592
va = sva & ~cpuinfo.dcache_line_mask;
sys/arm/include/cpu.h
593
for ( ; va < eva; va += cpuinfo.dcache_line_size) {
sys/arm/include/cpuinfo.h
122
extern struct cpuinfo cpuinfo;
sys/arm/include/pmap_var.h
124
if (!cpuinfo.coherent_walk)
sys/arm/include/pmap_var.h
135
if (!cpuinfo.coherent_walk)
sys/arm/include/pmap_var.h
264
if (!cpuinfo.coherent_walk)
sys/arm/include/pmap_var.h
275
if (!cpuinfo.coherent_walk)
sys/dev/ocs_fc/ocs_os.c
902
ocs_get_cpuinfo(ocs_cpuinfo_t *cpuinfo)
sys/dev/ocs_fc/ocs_os.c
904
cpuinfo->num_cpus = mp_ncpus;
sys/dev/ocs_fc/ocs_os.c
911
static ocs_cpuinfo_t cpuinfo;
sys/dev/ocs_fc/ocs_os.c
913
if (cpuinfo.num_cpus == 0) {
sys/dev/ocs_fc/ocs_os.c
914
ocs_get_cpuinfo(&cpuinfo);
sys/dev/ocs_fc/ocs_os.c
916
return cpuinfo.num_cpus;
sys/dev/ocs_fc/ocs_os.h
1396
extern int32_t ocs_get_cpuinfo(ocs_cpuinfo_t *cpuinfo);