CHIP_REV_IS_EMUL
} else if (CHIP_REV_IS_EMUL(sc)) {
} else if (CHIP_REV_IS_EMUL(sc)) {
int factor = CHIP_REV_IS_EMUL(sc) ? 1000 :
if (CHIP_REV_IS_EMUL(sc)) {
if (CHIP_REV_IS_EMUL(sc))
if (CHIP_REV_IS_EMUL(sc)) {
if (CHIP_REV_IS_EMUL(sc) || CHIP_REV_IS_FPGA(sc))
if (CHIP_REV_IS_EMUL(sc)) {
if (CHIP_REV_IS_EMUL(sc)) {
if (CHIP_REV_IS_EMUL(sc)) {
if (CHIP_REV_IS_EMUL(sc))
if (CHIP_REV_IS_EMUL(sc))
(CHIP_REV_IS_EMUL(_p_dev) || CHIP_REV_IS_FPGA(_p_dev))
else if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
if (CHIP_REV_IS_EMUL(p_dev)) {
if (CHIP_REV_IS_EMUL(p_dev) &&
if (!CHIP_REV_IS_EMUL(p_dev) || ECORE_IS_BB(p_dev))
if (CHIP_REV_IS_EMUL(p_dev)) {
if (CHIP_REV_IS_EMUL(p_dev)) {
} else if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
else if (CHIP_REV_IS_EMUL(p_dev) && ECORE_IS_CMT(p_dev))
if (CHIP_REV_IS_EMUL(p_dev)) {
} else if (CHIP_REV_IS_EMUL(p_dev) || CHIP_REV_IS_TEDIBEAR(p_dev)) {
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev) && ECORE_IS_AH(p_hwfn->p_dev)) {
if (CHIP_REV_IS_EMUL(p_dev)) {
if (CHIP_REV_IS_EMUL(p_dev) && ECORE_IS_AH(p_dev))
if (CHIP_REV_IS_EMUL(p_dev)) {
if (!CHIP_REV_IS_EMUL(p_dev)) {
u32 factor = (CHIP_REV_IS_EMUL(p_hwfn->p_dev) ?
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev))
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev))
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev))
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev))
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev))
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev)) {
if (CHIP_REV_IS_EMUL(p_hwfn->p_dev) && sleep_between_iter)