cntr
struct buf_pr *bp, struct ip_fw_rule *rule, struct ip_fw_bcounter *cntr)
if (cntr != NULL) {
pr_u64(bp, &cntr->pcnt, fo->pcwidth);
pr_u64(bp, &cntr->bcnt, fo->bcwidth);
bprintf(bp, "%10u ", cntr->timestamp);
if (cntr->timestamp > 0) {
t = _long_to_time(cntr->timestamp);
struct ip_fw_bcounter *cntr;
cntr = (struct ip_fw_bcounter *)(rtlv + 1);
r = (struct ip_fw_rule *)((caddr_t)cntr + cntr->size);
width = pr_u64(NULL, &cntr->pcnt, 0);
width = pr_u64(NULL, &cntr->bcnt, 0);
struct ip_fw_bcounter *cntr;
cntr = (struct ip_fw_bcounter *)(rtlv + 1);
r = (struct ip_fw_rule *)((caddr_t)cntr + cntr->size);
cntr = NULL;
show_static_rule(co, fo, bp, r, cntr);
uint16_t cntr /* CQ pending completion counter */;
uint16_t cntr /* CQ pending completion counter */;
pmu_dmc620_rd4(desc->pd_rw_arg, cntr(class, ri),
pmu_dmc620_wr4(desc->pd_rw_arg, cntr(class, ri),
pmu_dmc620_wr4(desc->pd_rw_arg, cntr(class, ri),
pmu_dmc620_wr4(desc->pd_rw_arg, cntr(class, ri),
pmu_dmc620_wr4(desc->pd_rw_arg, cntr(class, ri),
pmu_dmc620_wr4(desc->pd_rw_arg, cntr(class, ri),
pmu_dmc620_wr4(desc->pd_rw_arg, cntr(class, ri),
pmu_dmc620_wr4(desc->pd_rw_arg, cntr(class, ri),
pmu_dmc620_rd4(void *arg, u_int cntr, off_t reg)
KASSERT(cntr < DMC620_COUNTERS_N, ("Wrong counter unit %d", cntr));
val = RD4(sc, DMC620_REG(cntr, reg));
pmu_dmc620_wr4(void *arg, u_int cntr, off_t reg, uint32_t val)
KASSERT(cntr < DMC620_COUNTERS_N, ("Wrong counter unit %d", cntr));
WR4(sc, DMC620_REG(cntr, reg), val);
uint32_t pmu_dmc620_rd4(void *arg, u_int cntr, off_t reg);
void pmu_dmc620_wr4(void *arg, u_int cntr, off_t reg, uint32_t val);
#define PKTCNTR_ADD(cntr, len) \
do { (cntr)->packets++; (cntr)->bytes += len; } while (/*CONSTCOND*/ 0)
newsav->cntr = sav->cntr;
uint64_t cntr; /* counter for GCM and CTR */
ipsec_kmod_enter(volatile u_int *cntr)
old = *cntr;
} while(atomic_cmpset_acq_int(cntr, old, new) == 0);
ipsec_kmod_exit(volatile u_int *cntr)
old = *cntr;
} while (atomic_cmpset_rel_int(cntr, old, new) == 0);
ipsec_kmod_drain(volatile u_int *cntr)
old = *cntr;
} while (atomic_cmpset_acq_int(cntr, old, new) == 0);
while (atomic_cmpset_int(cntr, 0, 0) == 0)
uint64_t cntr;
cntr = sav->cntr++;
be64enc(&ivp[4], cntr);
counter_u64_t cntr; /* Pointer to rule counters */
counter_u64_add((_cntr)->cntr, 1); \
counter_u64_add((_cntr)->cntr + 1, _bytes); \
counter_u64_zero((_cntr)->cntr); \
counter_u64_zero((_cntr)->cntr + 1); \
rule->cntr = uma_zalloc_pcpu(V_ipfw_cntr_zone, M_WAITOK | M_ZERO);
uma_zfree_pcpu(V_ipfw_cntr_zone, rule->cntr);
export_cntr1_base(struct ip_fw *krule, struct ip_fw_bcounter *cntr)
cntr->size = sizeof(*cntr);
if (krule->cntr != NULL) {
cntr->pcnt = counter_u64_fetch(krule->cntr);
cntr->bcnt = counter_u64_fetch(krule->cntr + 1);
cntr->timestamp = krule->timestamp;
if (cntr->timestamp > 0) {
cntr->timestamp += boottime.tv_sec;
struct ip_fw_bcounter *cntr;
cntr = (struct ip_fw_bcounter *)(tlv + 1);
urule = (struct ip_fw_rule *)(cntr + 1);
export_cntr1_base(krule, cntr);