Symbol: chip_rev
sys/arm/nvidia/as3722.c
206
rv = RD1(sc, AS3722_ASIC_ID2, &sc->chip_rev);
sys/arm/nvidia/as3722.c
211
device_printf(sc->dev, "AS3722 rev: 0x%x\n", sc->chip_rev);
sys/arm/nvidia/as3722.h
267
uint8_t chip_rev;
sys/dev/bhnd/bhnd.h
212
uint8_t chip_rev; /**< chip revision */
sys/dev/bhnd/bhnd_erom.c
287
cid->chip_rev = CHIPC_GET_BITS(idreg, CHIPC_ID_REV);
sys/dev/bhnd/bhnd_match.h
156
chip_rev:1,
sys/dev/bhnd/bhnd_match.h
165
struct bhnd_hwrev_match chip_rev; /**< matching chip revisions */
sys/dev/bhnd/bhnd_match.h
172
_BHND_COPY_MATCH_FIELD(_src, chip_rev), \
sys/dev/bhnd/bhnd_match.h
181
#define BHND_MATCH_CHIP_REV(_rev) _BHND_SET_MATCH_FIELD(chip_rev, \
sys/dev/bhnd/bhnd_match.h
282
chip_rev:1,
sys/dev/bhnd/bhnd_match.h
302
struct bhnd_hwrev_match chip_rev; /**< matching chip revisions */
sys/dev/bhnd/bhnd_subr.c
770
if (desc->m.match.chip_rev &&
sys/dev/bhnd/bhnd_subr.c
771
!bhnd_hwrev_matches(chip->chip_rev, &desc->chip_rev))
sys/dev/bhnd/cores/chipc/pwrctl/bhnd_pwrctl.c
140
if (cid->chip_rev <= 1 && hostb_class == BHND_DEVCLASS_PCI)
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
1864
if (sc->cid.chip_id == BHND_CHIPID_BCM4329 && sc->cid.chip_rev == 0) {
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
1984
if (sc->cid.chip_id == BHND_CHIPID_BCM4329 && sc->cid.chip_rev == 0) {
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2057
if (sc->cid.chip_rev != 0)
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2135
sc->cid.chip_id, sc->cid.chip_rev, BHND_PMU_REV(sc));
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2377
if (sc->cid.chip_rev == 0)
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2432
sc->cid.chip_id, sc->cid.chip_rev, BHND_PMU_REV(sc), clock);
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2631
"rev %hhd pmurev %hhd\n", sc->cid.chip_id, sc->cid.chip_rev,
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2673
if (sc->cid.chip_id == BHND_CHIPID_BCM4329 && sc->cid.chip_rev == 2) {
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2985
if (chip_id == BHND_CHIPID_BCM6362 && sc->cid.chip_rev == 0) {
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
2991
KASSERT(sc->cid.chip_rev != 0, ("invalid clock config"));
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
3396
if (sc->cid.chip_rev <= 2)
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
3424
if (sc->cid.chip_rev == 0)
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
682
if (sc->cid.chip_id == BHND_CHIPID_BCM4325 && sc->cid.chip_rev <= 1)
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
763
if (sc->cid.chip_rev >= 2)
sys/dev/bhnd/cores/pmu/bhnd_pmu_subr.c
816
if (sc->cid.chip_rev >= 0x2) {
sys/dev/bnxt/bnxt_en/bnxt.h
664
uint8_t chip_rev;
sys/dev/bnxt/bnxt_en/bnxt_hwrm.c
959
softc->ver_info->chip_rev = resp->chip_rev;
sys/dev/bnxt/bnxt_en/bnxt_sysctl.c
1212
"chip_rev", CTLFLAG_RD, &vi->chip_rev, 0, "chip revision");
sys/dev/bnxt/bnxt_en/hsi_struct_def.h
2208
uint8_t chip_rev;
sys/dev/bnxt/bnxt_en/if_bnxt.c
2420
if (BNXT_CHIP_P5_PLUS(softc) && (!softc->ver_info->chip_rev) &&
sys/dev/bnxt/bnxt_re/ib_verbs.c
5362
chip_met_rev_num |= ((u32)cctx->chip_rev & 0xFF) <<
sys/dev/bnxt/bnxt_re/main.c
1798
cctx->chip_rev = resp.chip_rev;
sys/dev/bnxt/bnxt_re/qplib_res.h
98
u8 chip_rev;
sys/dev/bwn/if_bwn.c
3813
sc->sc_cid.chip_rev == 3)
sys/dev/cxgbe/t4_main.c
11148
if (chip_rev(sc) == 0) {
sys/dev/cxgbe/t4_main.c
11224
if (chip_rev(sc) == 0) {
sys/dev/cxgbe/t4_main.c
7535
regs->version = chip_id(sc) | chip_rev(sc) << 10;
sys/dev/cxgbe/t4_main.c
7927
NULL, chip_rev(sc), "chip hardware revision");
sys/dev/etherswitch/arswitch/arswitch.c
106
sc->chip_rev = (id & AR8X16_MASK_CTRL_REV_MASK);
sys/dev/etherswitch/arswitch/arswitch.c
137
chipname, sc->chip_ver, sc->chip_rev);
sys/dev/etherswitch/arswitch/arswitch_8327.c
159
sc->chip_rev);
sys/dev/etherswitch/arswitch/arswitch_8327.c
160
switch (sc->chip_rev) {
sys/dev/etherswitch/arswitch/arswitch_8327.c
653
if (sc->chip_rev == 1)
sys/dev/etherswitch/arswitch/arswitchvar.h
68
int chip_rev;
sys/dev/qlnx/qlnxe/ecore.h
823
u8 chip_rev;
sys/dev/qlnx/qlnxe/ecore.h
827
#define CHIP_REV_IS_TEDIBEAR(_p_dev) ((_p_dev)->chip_rev == 0x5)
sys/dev/qlnx/qlnxe/ecore.h
828
#define CHIP_REV_IS_EMUL_A0(_p_dev) ((_p_dev)->chip_rev == 0xe)
sys/dev/qlnx/qlnxe/ecore.h
829
#define CHIP_REV_IS_EMUL_B0(_p_dev) ((_p_dev)->chip_rev == 0xc)
sys/dev/qlnx/qlnxe/ecore.h
832
#define CHIP_REV_IS_FPGA_A0(_p_dev) ((_p_dev)->chip_rev == 0xf)
sys/dev/qlnx/qlnxe/ecore.h
833
#define CHIP_REV_IS_FPGA_B0(_p_dev) ((_p_dev)->chip_rev == 0xd)
sys/dev/qlnx/qlnxe/ecore.h
840
(!(_p_dev)->chip_rev && !(_p_dev)->chip_metal))
sys/dev/qlnx/qlnxe/ecore.h
843
((_p_dev)->chip_rev == 1 && !(_p_dev)->chip_metal))
sys/dev/qlnx/qlnxe/ecore.h
847
(!(_p_dev)->chip_rev && !(_p_dev)->chip_metal)
sys/dev/qlnx/qlnxe/ecore.h
849
((_p_dev)->chip_rev == 1 && !(_p_dev)->chip_metal)
sys/dev/qlnx/qlnxe/ecore_dev.c
5699
'A' + p_dev->chip_rev, (int)p_dev->chip_metal);
sys/dev/qlnx/qlnxe/ecore_dev.c
5736
p_dev->chip_rev = (u8)GET_FIELD(tmp, CHIP_REV);
sys/dev/qlnx/qlnxe/ecore_dev.c
5766
'A' + p_dev->chip_rev, (int)p_dev->chip_metal,
sys/dev/qlnx/qlnxe/ecore_dev.c
5767
p_dev->chip_num, p_dev->chip_rev, p_dev->chip_bond_id,
sys/dev/qlnx/qlnxe/ecore_sriov.c
1871
pfdev_info->chip_rev = p_hwfn->p_dev->chip_rev;
sys/dev/qlnx/qlnxe/ecore_vf.c
469
p_hwfn->p_dev->chip_rev = (u8) resp->pfdev_info.chip_rev;
sys/dev/qlnx/qlnxe/ecore_vfpf_if.h
219
u16 chip_rev;