chip_type
if (cid->chip_type != BHND_CHIPTYPE_BCMA)
switch (cid->chip_type) {
uint8_t chip_type; /**< chip type (BHND_CHIPTYPE_*) */
cid->chip_type = CHIPC_GET_BITS(idreg, CHIPC_ID_BUS);
if (BHND_CHIPTYPE_HAS_EROM(cid->chip_type)) {
chip_type:1,
uint8_t chip_type; /**< required chip type (BHND_CHIPTYPE_*) */
_BHND_COPY_MATCH_FIELD(_src, chip_type),\
#define BHND_MATCH_CHIP_TYPE(_type) _BHND_SET_MATCH_FIELD(chip_type, \
chip_type:1,
uint8_t chip_type; /**< required chip type (BHND_CHIPTYPE_*) */
switch (chip_id->chip_type) {
if (desc->m.match.chip_type && chip->chip_type != desc->chip_type)
if (probe->cid.chip_type == BHND_CHIPTYPE_SIBA) {
if (cid->chip_type != BHND_CHIPTYPE_SIBA)
if (hint->chip_type != BHND_CHIPTYPE_SIBA)
if (cid->chip_type != BHND_CHIPTYPE_SIBA)
uint8_t chip_type;
softc->ver_info->chip_type = resp->chip_platform_type;
"chip_type", CTLFLAG_RD, vi->chip_type > MAX_CHIP_TYPE ?
bnxt_chip_type[MAX_CHIP_TYPE] : bnxt_chip_type[vi->chip_type], 0,
if (sc->chip_type == RTL8366RB)
if (sc->chip_type == RTL8366RB)
sc->chip_type = RTL8366RB;
sc->chip_type = RTL8366SR;
if (sc->chip_type == RTL8366SR) { // RTL8366SR work around
int chip_type;
if (sc->chip_type == RTL8366RB) {
(sc->chip_type == 0 ? (_r[RTL8366_VMCR_FID_REG] & RTL8366_VMCR_FID_FID_MASK) : \
#define RTL8366_PVCR_BASE (sc->chip_type == 0 ? 0x0063 : 0x0058)
#define RTL8366_CVCR (sc->chip_type == 0 ? 0x050A : 0x0104)
#define RTL8366_MCTLR (sc->chip_type == 0 ? 0x13f0 : 0x11F0)
#define RTL8366_PACR (sc->chip_type == 0 ? 0x8000 : 0x8028)
#define RTL8366_PADR (sc->chip_type == 0 ? 0x8002 : 0x8029)
(0x8000 | (1 << (((phy) & 0x1f) + 9)) | (((page) & (sc->chip_type == 0 ? 0xf : 0x7)) << 5) | ((reg) & 0x1f))
#define RTL8366_PLSR_BASE (sc->chip_type == 0 ? 0x0014 : 0x0060)
#define RTL8366_VMCR_BASE (sc->chip_type == 0 ? 0x0020 : 0x0016)
#define RTL8366_VMCR_MULT (sc->chip_type == 0 ? 3 : 2)
#define RTL8366_VMCR_MU_MEMBER_MASK (sc->chip_type == 0 ? 0x00ff : 0x003f)
#define RTL8366_VMCR_MU_UNTAG_SHIFT (sc->chip_type == 0 ? 8 : 6)
#define RTL8366_VMCR_MU_UNTAG_MASK (sc->chip_type == 0 ? 0xff00 : 0x0fc0)
#define RTL8366_VMCR_FID_REG (sc->chip_type == 0 ? 2 : 1)
#define RTL8366_VMCR_FID_FID_SHIFT (sc->chip_type == 0 ? 0 : 12)
#define RTL8366_VMCR_FID_FID_MASK (sc->chip_type == 0 ? 0x0007 : 0x7000)
enum chip_type chip;