sys/arm/allwinner/aw_sid.c

285

#define RD1(sc, reg) bus_read_1((sc)->res, (reg))

sys/arm/broadcom/bcm2835/bcm2838_pci.c

329

data = bus_read_1(sc->base.base.res, offset);

sys/arm/freescale/imx/imx_i2c.c

226

return (bus_read_1(sc->res, off));

sys/arm/nvidia/tegra_sdhci.c

131

return (bus_read_1(sc->mem_res, off));

sys/arm64/rockchip/rk_pcie.c

264

val = bus_read_1(sc->apb_mem_res, base + reg);

sys/dev/ae/if_ae.c

193

bus_read_1((sc)->mem[0], (reg))

sys/dev/agp/agp_i810.c

1183

if ((bus_read_1(sc->sc_res[0], AGP_I810_DRT) & AGP_I810_DRT_POPULATED)

sys/dev/ahci/ahci.h

554

bus_read_1((res), (offset))

sys/dev/amdpm/amdpm.c

134

(bus_read_1(amdpm->res, register))

sys/dev/amdsbwd/amdsbwd.c

136

return (bus_read_1(res, 1)); /* Data */

sys/dev/amdsmb/amdsmb.c

119

(bus_read_1(amdsmb->res, register))

sys/dev/asmc/asmcvar.h

61

#define ASMC_DATAPORT_READ(sc) bus_read_1(sc->sc_ioport, 0x00)

sys/dev/asmc/asmcvar.h

69

#define ASMC_CMDPORT_READ(sc) bus_read_1(sc->sc_ioport, 0x04)

sys/dev/asmc/asmcvar.h

78

#define ASMC_INTPORT_READ(sc) bus_read_1(sc->sc_ioport, 0x1f)

sys/dev/ata/ata-all.h

503

bus_read_1((res), (offset))

sys/dev/bhnd/bhnd.h

1483

bus_read_1((r)->res, (o)) : \

sys/dev/bhnd/bhndb/bhndb_pci.c

1645

return (bus_read_1(r, res_offset));

sys/dev/bhnd/bhndb/bhndb_pci.c

757

return (bus_read_1(r, r_offset));

sys/dev/cardbus/cardbus_cis.c

417

*tupleid = bus_read_1(res, start + *off);

sys/dev/cardbus/cardbus_cis.c

418

*len = bus_read_1(res, start + *off + 1);

sys/dev/cardbus/cardbus_cis.c

540

if ((bus_read_1(res, pcidata +

sys/dev/flash/cqspi.c

82

#define READ1(_sc, _reg) bus_read_1((_sc)->res[0], _reg)

sys/dev/flash/cqspi.c

87

#define READ_DATA_1(_sc, _reg) bus_read_1((_sc)->res[1], _reg)

sys/dev/flash/flexspi/flex_spi.c

517

*(uint8_t*)data = bus_read_1(sc->ahb_mem_res, offset);

sys/dev/fxp/if_fxpvar.h

244

#define CSR_READ_1(sc, reg) bus_read_1(sc->fxp_res[0], reg)

sys/dev/glxiic/glxiic.c

490

status = bus_read_1(sc->smb_res, GLXIIC_SMB_STS);

sys/dev/glxiic/glxiic.c

509

ctrl1 = bus_read_1(sc->smb_res, GLXIIC_SMB_CTRL1);

sys/dev/glxiic/glxiic.c

519

bus_read_1(sc->smb_res, GLXIIC_SMB_SDA);

sys/dev/glxiic/glxiic.c

582

ctrl_sts = bus_read_1(sc->smb_res, GLXIIC_SMB_CTRL_STS);

sys/dev/glxiic/glxiic.c

694

data = bus_read_1(sc->smb_res, GLXIIC_SMB_SDA);

sys/dev/glxiic/glxiic.c

744

ctrl1 = bus_read_1(sc->smb_res, GLXIIC_SMB_CTRL1);

sys/dev/glxiic/glxiic.c

826

*sc->data++ = bus_read_1(sc->smb_res, GLXIIC_SMB_SDA);

sys/dev/glxiic/glxiic.c

835

ctrl1 = bus_read_1(sc->smb_res, GLXIIC_SMB_CTRL1);

sys/dev/glxiic/glxiic.c

873

ctrl1 = bus_read_1(sc->smb_res, GLXIIC_SMB_CTRL1);

sys/dev/glxiic/glxiic.c

975

ctrl1 = bus_read_1(sc->smb_res, GLXIIC_SMB_CTRL1);

sys/dev/gpio/pl061.c

125

if (mask & bus_read_1(sc->sc_mem_res, PL061_DIR))

sys/dev/gpio/pl061.c

150

tmp = bus_read_1(sc->sc_mem_res, a);

sys/dev/gpio/pl061.c

192

if (bus_read_1(sc->sc_mem_res, PL061_PIN_TO_ADDR(pin)))

sys/dev/gpio/pl061.c

229

d = ~bus_read_1(sc->sc_mem_res, PL061_PIN_TO_ADDR(pin));

sys/dev/gpio/pl061.c

419

status = bus_read_1(sc->sc_mem_res, PL061_STATUS);

sys/dev/hdmi/dwc_hdmi.h

48

return (bus_read_1(sc->sc_mem_res, off << sc->sc_reg_shift));

sys/dev/ichsmb/ichsmb.c

231

*byte = bus_read_1(sc->io_res, ICH_D0);

sys/dev/ichsmb/ichsmb.c

303

*byte = bus_read_1(sc->io_res, ICH_D0);

sys/dev/ichsmb/ichsmb.c

326

*word = (bus_read_1(sc->io_res,

sys/dev/ichsmb/ichsmb.c

328

| (bus_read_1(sc->io_res,

sys/dev/ichsmb/ichsmb.c

356

*rdata = (bus_read_1(sc->io_res,

sys/dev/ichsmb/ichsmb.c

358

| (bus_read_1(sc->io_res,

sys/dev/ichsmb/ichsmb.c

503

status = bus_read_1(sc->io_res, ICH_HST_STA);

sys/dev/ichsmb/ichsmb.c

572

sc->block_count = bus_read_1(

sys/dev/ichsmb/ichsmb.c

593

bus_read_1(sc->io_res,

sys/dev/ichsmb/ichsmb.c

631

bus_read_1(sc->io_res, ICH_HST_STA));

sys/dev/ichsmb/ichsmb.c

656

bus_read_1(sc->io_res, ICH_HST_STA));

sys/dev/ichwd/ichwd.c

305

bus_read_1((sc)->tco_res, (off))

sys/dev/ida/idavar.h

37

bus_read_1((ida)->regs, port)

sys/dev/iicbus/controller/cadence/cdnc_i2c.c

113

#define RD1(sc, off) (bus_read_1((sc)->mem_res, (off)))

sys/dev/iicbus/controller/opencores/iicoc.c

66

val = bus_read_1(sc->mem_res, reg<<sc->reg_shift);

sys/dev/intel/pchtherm.c

163

sc->enable = bus_read_1(sc->tbar, PCHTHERM_REG_TSEL);

sys/dev/intel/pchtherm.c

172

sc->enable = bus_read_1(sc->tbar, PCHTHERM_REG_TSEL);

sys/dev/intel/pchtherm.c

180

sc->ctten = bus_read_1(sc->tbar, PCHTHERM_REG_TSC);

sys/dev/intel/pchtherm.c

184

val = bus_read_1(sc->tbar, PCHTHERM_REG_TSREL);

sys/dev/intel/pchtherm.c

188

val = bus_read_1(sc->tbar, PCHTHERM_REG_TSMIC);

sys/dev/intpm/intpm.c

128

return (bus_read_1(res, 1)); /* Data */

sys/dev/intpm/intpm.c

186

addr = bus_read_1(res, AMDFCH41_PM_DECODE_EN0);

sys/dev/intpm/intpm.c

422

if ((bus_read_1(sc->io_res, PIIX4_SMBHSTSTS) & PIIX4_SMBHSTSTAT_BUSY) ||

sys/dev/intpm/intpm.c

424

(bus_read_1(sc->io_res, PIIX4_SMBSLVSTS) & PIIX4_SMBSLVSTS_BUSY) ||

sys/dev/intpm/intpm.c

446

status = bus_read_1(sc->io_res, PIIX4_SMBHSTSTS);

sys/dev/intpm/intpm.c

453

tmp = bus_read_1(sc->io_res, PIIX4_SMBHSTCNT);

sys/dev/intpm/intpm.c

470

status = bus_read_1(sc->io_res, PIIX4_SMBSLVSTS);

sys/dev/intpm/intpm.c

496

slvcnt = bus_read_1(sc->io_res, PIIX4_SMBSLVCNT);

sys/dev/intpm/intpm.c

515

addr = bus_read_1(sc->io_res, PIIX4_SMBHSTDAT0);

sys/dev/intpm/intpm.c

532

tmp = bus_read_1(sc->io_res, PIIX4_SMBHSTCNT);

sys/dev/intpm/intpm.c

585

if (bus_read_1(sc->io_res, PIIX4_SMBHSTSTS) &

sys/dev/intpm/intpm.c

591

status = bus_read_1(sc->io_res, PIIX4_SMBHSTSTS);

sys/dev/intpm/intpm.c

601

tmp = bus_read_1(sc->io_res, PIIX4_SMBHSTCNT);

sys/dev/intpm/intpm.c

622

status = bus_read_1(sc->io_res, PIIX4_SMBHSTSTS);

sys/dev/intpm/intpm.c

721

*byte = bus_read_1(sc->io_res, PIIX4_SMBHSTCMD);

sys/dev/intpm/intpm.c

723

*byte = bus_read_1(sc->io_res, PIIX4_SMBHSTDAT0);

sys/dev/intpm/intpm.c

790

*byte = bus_read_1(sc->io_res, PIIX4_SMBHSTDAT0);

sys/dev/intpm/intpm.c

812

*word = bus_read_1(sc->io_res, PIIX4_SMBHSTDAT0);

sys/dev/intpm/intpm.c

813

*word |= bus_read_1(sc->io_res, PIIX4_SMBHSTDAT1) << 8;

sys/dev/intpm/intpm.c

843

bus_read_1(sc->io_res, PIIX4_SMBHSTCNT);

sys/dev/intpm/intpm.c

871

bus_read_1(sc->io_res, PIIX4_SMBHSTCNT);

sys/dev/intpm/intpm.c

878

nread = bus_read_1(sc->io_res, PIIX4_SMBHSTDAT0);

sys/dev/intpm/intpm.c

882

buf[i] = bus_read_1(sc->io_res, PIIX4_SMBBLKDAT);

sys/dev/ipmi/ipmivars.h

214

bus_read_1((sc)->ipmi_io_res[0], (sc)->ipmi_io_spacing * (x))

sys/dev/ipmi/ipmivars.h

220

bus_read_1((sc)->ipmi_io_res[(x)], 0)

sys/dev/ips/ips.h

59

#define ips_read_1(sc,offset) bus_read_1(sc->iores, offset)

sys/dev/mgb/if_mgb.h

222

bus_read_1((sc)->regs, reg)

sys/dev/mlx/mlxreg.h

119

#define MLX_V4_GET_STATUS_IDENT(sc) bus_read_1 (sc->mlx_mem, MLX_V4_STATUS_IDENT)

sys/dev/mlx/mlxreg.h

126

#define MLX_V4_GET_FWERROR(sc) bus_read_1 (sc->mlx_mem, MLX_V4_FWERROR)

sys/dev/mlx/mlxreg.h

128

#define MLX_V4_GET_FWERROR_PARAM1(sc) bus_read_1 (sc->mlx_mem, MLX_V4_FWERROR_PARAM1)

sys/dev/mlx/mlxreg.h

129

#define MLX_V4_GET_FWERROR_PARAM2(sc) bus_read_1 (sc->mlx_mem, MLX_V4_FWERROR_PARAM2)

sys/dev/mlx/mlxreg.h

164

#define MLX_V5_GET_STATUS_IDENT(sc) bus_read_1 (sc->mlx_mem, MLX_V5_STATUS_IDENT)

sys/dev/mlx/mlxreg.h

166

#define MLX_V5_GET_IDBR(sc) bus_read_1 (sc->mlx_mem, MLX_V5_IDBR)

sys/dev/mlx/mlxreg.h

168

#define MLX_V5_GET_ODBR(sc) bus_read_1 (sc->mlx_mem, MLX_V5_ODBR)

sys/dev/mlx/mlxreg.h

171

#define MLX_V5_GET_FWERROR(sc) bus_read_1 (sc->mlx_mem, MLX_V5_FWERROR)

sys/dev/mlx/mlxreg.h

173

#define MLX_V5_GET_FWERROR_PARAM1(sc) bus_read_1 (sc->mlx_mem, MLX_V5_FWERROR_PARAM1)

sys/dev/mlx/mlxreg.h

174

#define MLX_V5_GET_FWERROR_PARAM2(sc) bus_read_1 (sc->mlx_mem, MLX_V5_FWERROR_PARAM2)

sys/dev/mlx/mlxreg.h

82

#define MLX_V3_GET_STATUS_IDENT(sc) bus_read_1 (sc->mlx_mem, MLX_V3_STATUS_IDENT)

sys/dev/mlx/mlxreg.h

84

#define MLX_V3_GET_IDBR(sc) bus_read_1 (sc->mlx_mem, MLX_V3_IDBR)

sys/dev/mlx/mlxreg.h

86

#define MLX_V3_GET_ODBR(sc) bus_read_1 (sc->mlx_mem, MLX_V3_ODBR)

sys/dev/mlx/mlxreg.h

89

#define MLX_V3_GET_FWERROR(sc) bus_read_1 (sc->mlx_mem, MLX_V3_FWERROR)

sys/dev/mlx/mlxreg.h

91

#define MLX_V3_GET_FWERROR_PARAM1(sc) bus_read_1 (sc->mlx_mem, MLX_V3_FWERROR_PARAM1)

sys/dev/mlx/mlxreg.h

92

#define MLX_V3_GET_FWERROR_PARAM2(sc) bus_read_1 (sc->mlx_mem, MLX_V3_FWERROR_PARAM2)

sys/dev/msk/if_mskreg.h

2136

bus_read_1((sc)->msk_res[0], (reg))

sys/dev/msk/if_mskreg.h

2150

bus_read_1((sc)->msk_res[0], Y2_CFG_SPC + (reg))

sys/dev/mvs/mvs.h

634

bus_read_1((res), (offset))

sys/dev/nctgpio/nctgpio.c

786

val = bus_read_1(sc->iores, reg);

sys/dev/ncthwm/ncthwm.c

129

return (bus_read_1(sc->iores, 1));

sys/dev/nfsmb/nfsmb.c

126

(bus_read_1(nfsmb->res, register))

sys/dev/pbio/pbio.c

141

return (bus_read_1(scp->res, off));

sys/dev/pcf/pcfvar.h

118

data = bus_read_1(sc->res_ioport, 0);

sys/dev/pcf/pcfvar.h

129

data = bus_read_1(sc->res_ioport, 1);

sys/dev/pci/pci.c

3782

bios_sem = bus_read_1(res, eecp + XHCI_XECP_BIOS_SEM);

sys/dev/pci/pci.c

3796

bios_sem = bus_read_1(res, eecp +

sys/dev/pci/pci.c

3807

offs = bus_read_1(res, XHCI_CAPLENGTH);

sys/dev/pci/pci_dw.c

102

return (bus_read_1(sc->dbi_res, reg));

sys/dev/pci/pci_dw.c

550

data = bus_read_1(res, reg);

sys/dev/pci/pci_host_generic.c

317

data = bus_read_1(sc->res, offset);

sys/dev/pci/pci_user.c

1065

pbi->pbi_value = bus_read_1(res, offset);

sys/dev/ppc/ppc.c

1329

#define r_reg(reg,ppc) (bus_read_1((ppc)->res_ioport, reg))

sys/dev/ppc/ppcreg.h

152

#define r_dtr(ppc) (bus_read_1((ppc)->res_ioport, PPC_SPP_DTR))

sys/dev/ppc/ppcreg.h

153

#define r_str(ppc) (bus_read_1((ppc)->res_ioport, PPC_SPP_STR))

sys/dev/ppc/ppcreg.h

154

#define r_ctr(ppc) (bus_read_1((ppc)->res_ioport, PPC_SPP_CTR))

sys/dev/ppc/ppcreg.h

156

#define r_epp_A(ppc) (bus_read_1((ppc)->res_ioport, PPC_EPP_ADDR))

sys/dev/ppc/ppcreg.h

157

#define r_epp_D(ppc) (bus_read_1((ppc)->res_ioport, PPC_EPP_DATA))

sys/dev/ppc/ppcreg.h

158

#define r_cnfgA(ppc) (bus_read_1((ppc)->res_ioport, PPC_ECP_CNFGA))

sys/dev/ppc/ppcreg.h

159

#define r_cnfgB(ppc) (bus_read_1((ppc)->res_ioport, PPC_ECP_CNFGB))

sys/dev/ppc/ppcreg.h

160

#define r_ecr(ppc) (bus_read_1((ppc)->res_ioport, PPC_ECP_ECR))

sys/dev/ppc/ppcreg.h

161

#define r_fifo(ppc) (bus_read_1((ppc)->res_ioport, PPC_ECP_D_FIFO))

sys/dev/proto/proto_core.c

357

pci_read_config(dev, ofs, 1) : bus_read_1(r->r_d.res, ofs);

sys/dev/puc/puc.c

148

ilr = ~bus_read_1(sc->sc_port[idx].p_rres, 7);

sys/dev/puc/puc.c

159

ilr = bus_read_1(sc->sc_port[0].p_rres, 7);

sys/dev/puc/pucdata.c

1782

mask = bus_read_1(cres, off);

sys/dev/puc/pucdata.c

1922

v0 = bus_read_1(bar->b_res, REG_SPR);

sys/dev/puc/pucdata.c

1924

v1 = bus_read_1(bar->b_res, REG_SPR);

sys/dev/puc/pucdata.c

2019

v = bus_read_1(bar->b_res, efir + 1);

sys/dev/puc/pucdata.c

2023

v = bus_read_1(bar->b_res, efir + 1);

sys/dev/puc/pucdata.c

2219

value = bus_read_1(bar->b_res, 0x1000 + (idx << 9) +

sys/dev/puc/pucdata.c

2254

value = bus_read_1(bar->b_res, 0x04);

sys/dev/sdhci/sdhci_acpi.c

116

return bus_read_1(sc->mem_res, off);

sys/dev/sdhci/sdhci_fdt.c

257

return (bus_read_1(sc->mem_res[slot->num], off));

sys/dev/sdhci/sdhci_pci.c

180

return bus_read_1(sc->mem_res[slot->num], off);

sys/dev/sdhci/sdhci_xenon.c

71

return (bus_read_1(sc->mem_res, off));

sys/dev/sge/if_sge.c

186

#define CSR_READ_1(sc, reg) bus_read_1(sc->sge_res, reg)

sys/dev/siis/siis.h

430

bus_read_1((res), (offset))

sys/dev/sk/if_skreg.h

1286

bus_read_1((sc)->sk_res[0], (reg))

sys/dev/smc/if_smc.c

173

return (bus_read_1(sc->smc_reg, offset));

sys/dev/spibus/controller/allwinner/aw_spi.c

159

#define AW_SPI_READ_1(sc, reg) bus_read_1((sc)->res[0], (reg))

sys/dev/sram/mmio_sram.c

130

return (bus_read_1(sc->res[0], offset));

sys/dev/ste/if_stereg.h

493

bus_read_1((sc)->ste_res, reg)

sys/dev/stge/if_stgereg.h

101

bus_read_1((_sc)->sc_res[0], (reg))

sys/dev/superio/superio.c

111

return (bus_read_1(res, 1));

sys/dev/sym/sym_hipd.c

844

#define INB_OFF(o) bus_read_1(np->io_res, (o))

sys/dev/sym/sym_hipd.c

854

#define INB_OFF(o) bus_read_1(np->mmio_res, (o))

sys/dev/tpm/tpm_bus.c

39

return (bus_read_1(sc->mem_res, off));

sys/dev/vge/if_vgevar.h

228

bus_read_1(sc->vge_res, reg)

sys/dev/viapm/viapm.c

75

((u_char)bus_read_1(viapm->iores, port))

sys/dev/virtio/mmio/virtio_mmio.c

112

bus_read_1((sc)->res[0], (o))

sys/dev/virtio/pci/virtio_pci_legacy.c

115

bus_read_1((sc)->vtpci_res, (o))

sys/dev/virtio/pci/virtio_pci_modern.c

1309

return (bus_read_1(&sc->vtpci_common_res_map.vtrm_map, off));

sys/dev/virtio/pci/virtio_pci_modern.c

1372

return (bus_read_1(&sc->vtpci_isr_res_map.vtrm_map, off));

sys/dev/virtio/pci/virtio_pci_modern.c

1378

return (bus_read_1(&sc->vtpci_device_res_map.vtrm_map, off));

sys/dev/vmd/vmd.c

191

return (bus_read_1(sc->vmd_regs_res[0], offset));

sys/dev/vr/if_vrreg.h

754

#define CSR_READ_1(sc, reg) bus_read_1(sc->vr_res, reg)

sys/powerpc/amigaone/cpld_a1222.c

149

return (bus_read_1(sc->sc_mem, CPLD_MEM_DATA));

sys/powerpc/amigaone/cpld_a1222.c

163

tmp = bus_read_1(sc->sc_mem, CPLD_MEM_DATA) << 8;

sys/powerpc/amigaone/cpld_a1222.c

166

tmp |= bus_read_1(sc->sc_mem, CPLD_MEM_DATA);

sys/powerpc/mpc85xx/atpic.c

123

val = bus_read_1(sc->sc_res[icu], ofs);

sys/powerpc/mpc85xx/fsl_espi.c

108

#define FSL_ESPI_READ_FIFO(sc,off) bus_read_1(sc->sc_mem_res, off)

sys/powerpc/powermac/cuda.c

281

return (bus_read_1(sc->sc_memr, offset));

sys/powerpc/powermac/macgpio.c

292

val = bus_read_1(sc->sc_gpios,dinfo->gpio_num);

sys/powerpc/powermac/macgpio.c

314

val = bus_read_1(sc->sc_gpios,dinfo->gpio_num);

sys/powerpc/powermac/macgpio.c

334

return (bus_read_1(sc->sc_gpios,dinfo->gpio_num));

sys/powerpc/powermac/macgpio.c

372

sc->sc_saved_gpios[i] = bus_read_1(sc->sc_gpios, GPIO_BASE + i);

sys/powerpc/powermac/macgpio.c

374

sc->sc_saved_extint_gpios[i] = bus_read_1(sc->sc_gpios, GPIO_EXTINT_BASE + i);

sys/powerpc/powermac/macio.c

787

bus_read_1(sc->sc_memr, sc->sc_timebase);

sys/powerpc/powermac/pmu.c

550

return (bus_read_1(sc->sc_memr, offset));

sys/riscv/starfive/jh7110_pcie.c

180

data = bus_read_1(sc->cfg_mem_res, offset);

tools/bus_space/C/libbus.h

31

int16_t bus_read_1(int rid, long ofs);

tools/bus_space/Python/lang.c

420

{ "read_1", bus_read_1, METH_VARARGS, "Read a 1-byte data item." },