sys/dev/clk/rockchip/rk3288_cru.c

590

CDIV(0, "aclk_core_mp_s", "armclk", 0,

sys/dev/clk/rockchip/rk3288_cru.c

592

CDIV(0, "aclk_core_m0_s", "armclk", 0,

sys/dev/clk/rockchip/rk3288_cru.c

596

CDIV(0, "pclk_cpu_s", "aclk_cpu_pre", 0,

sys/dev/clk/rockchip/rk3288_cru.c

598

CDIV(0, "hclk_cpu_s", "aclk_cpu_pre", RK_CLK_COMPOSITE_DIV_EXP,

sys/dev/clk/rockchip/rk3288_cru.c

602

CDIV(0, "aclk_cpu_pre", "aclk_cpu_src", 0,

sys/dev/clk/rockchip/rk3288_cru.c

607

CDIV(0, "sclk_tsadc_s", "xin32k", 0,

sys/dev/clk/rockchip/rk3288_cru.c

613

CDIV(0, "uart4_src_s", "uart_src", 0,

sys/dev/clk/rockchip/rk3288_cru.c

629

CDIV(0, "spdif_pre_s", "spdif_src", 0,

sys/dev/clk/rockchip/rk3288_cru.c

651

CDIV(0, "pclk_peri_s", "aclk_peri_src", RK_CLK_COMPOSITE_DIV_EXP,

sys/dev/clk/rockchip/rk3288_cru.c

653

CDIV(0, "hclk_peri_s", "aclk_peri_src", RK_CLK_COMPOSITE_DIV_EXP,

sys/dev/clk/rockchip/rk3288_cru.c

681

CDIV(0, "uart1_src_s", "uart_src", 0,

sys/dev/clk/rockchip/rk3288_cru.c

688

CDIV(0, "uart2_src_s", "uart_src", 0,

sys/dev/clk/rockchip/rk3288_cru.c

694

CDIV(0, "uart3_src_s", "uart_src", 0,

sys/dev/clk/rockchip/rk3288_cru.c

733

CDIV(0, "sclk_saradc_s", "xin24m", 0,

sys/dev/clk/rockchip/rk3288_cru.c

747

CDIV(0, "crypto_s", "aclk_cpu_pre", 0,

sys/dev/clk/rockchip/rk3288_cru.c

758

CDIV(0, "hclk_vio", "aclk_vio0", 0,

sys/dev/clk/rockchip/rk3288_cru.c

788

CDIV(0, "pclk_pd_alive", "gpll", 0,

sys/dev/clk/rockchip/rk3288_cru.c

790

CDIV(0, "pclk_pd_pmu_s", "gpll", 0,

sys/dev/clk/rockchip/rk3288_cru.c

806

CDIV(0, "armcore3_s", "armclk", 0,

sys/dev/clk/rockchip/rk3288_cru.c

808

CDIV(0, "armcore2_s", "armclk", 0,

sys/dev/clk/rockchip/rk3288_cru.c

810

CDIV(0, "armcore1_s", "armclk", 0,

sys/dev/clk/rockchip/rk3288_cru.c

812

CDIV(0, "armcore0_s", "armclk", 0,

sys/dev/clk/rockchip/rk3288_cru.c

816

CDIV(0, "pclk_dbg_pre_s", "armclk", 0,

sys/dev/clk/rockchip/rk3288_cru.c

818

CDIV(0, "atclk_s", "armclk", 0,

sys/dev/clk/rockchip/rk3288_cru.c

820

CDIV(0, "l2ram_s", "armclk", 0,

sys/dev/clk/rockchip/rk3288_cru.c

836

CDIV(HCLK_HEVC, "hclk_hevc", "aclk_hevc", 0,

sys/dev/clk/rockchip/rk3288_cru.c

840

CDIV(0, "spdif_8ch_pre_s", "spdif_src", 0,

sys/dev/clk/rockchip/rk3328_cru.c

1008

CDIV(DCLK_HDMIPHY, "hdmiphy_div", "vop_dclk_src", 0, 40, 3, 3),

sys/dev/clk/rockchip/rk3328_cru.c

864

CDIV(0, "hclk_bus_pre_c", "aclk_bus_pre", 0, 1, 8, 2),

sys/dev/clk/rockchip/rk3328_cru.c

865

CDIV(0, "pclk_bus_pre_c", "aclk_bus_pre", 0, 1, 12, 2),

sys/dev/clk/rockchip/rk3328_cru.c

907

CDIV(0, "clk_spdif_div_c", "clk_spdif_pll", 0, 12, 0, 7),

sys/dev/clk/rockchip/rk3328_cru.c

915

CDIV(0, "clk_uart0_div_c", "clk_uart0_pll", 0, 14, 0, 7),

sys/dev/clk/rockchip/rk3328_cru.c

923

CDIV(0, "clk_uart1_div_c", "clk_uart1_pll", 0, 16, 0, 7),

sys/dev/clk/rockchip/rk3328_cru.c

931

CDIV(0, "clk_uart2_div_c", "clk_uart2_pll", 0, 18, 0, 7),

sys/dev/clk/rockchip/rk3328_cru.c

944

CDIV(0, "clk_tsadc_c", "xin24m", 0, 22, 0, 10),

sys/dev/clk/rockchip/rk3328_cru.c

947

CDIV(0, "clk_saradc_c", "xin24m", 0, 23, 0, 10),

sys/dev/clk/rockchip/rk3328_cru.c

955

CDIV(0, "pclk_gmac_c", "pclk_gmac", 0, 25, 8, 3),

sys/dev/clk/rockchip/rk3328_cru.c

958

CDIV(0, "clk_mac2phy_out_c", "clk_mac2phy", 0, 26, 8, 2),

sys/dev/clk/rockchip/rk3328_cru.c

969

CDIV(0, "pclk_peri_c", "aclk_peri_pre", 0, 29, 0, 2),

sys/dev/clk/rockchip/rk3328_cru.c

970

CDIV(0, "hclk_peri_c", "aclk_peri_pre", 0, 29, 4, 3),

sys/dev/clk/rockchip/rk3328_cru.c

998

CDIV(HCLK_VIO_PRE, "hclk_vio_pre", "aclk_vio_pre", 0, 37, 8, 5),

sys/dev/clk/rockchip/rk3399_cru.c

1005

CDIV(0, "clk_uart1_div_c", "clk_uart_src", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1011

CDIV(0, "clk_uart2_div_c", "clk_uart_src", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1017

CDIV(0, "clk_uart3_div_c", "clk_uart_src", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1052

CDIV(0, "pclk_hdcp_c", "aclk_hdcp", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1054

CDIV(0, "hclk_hdcp_c", "aclk_hdcp", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1056

CDIV(0, "pclk_vio_c", "aclk_vio", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1072

CDIV(0, "hclk_vop0_pre_c", "aclk_vop0_pre_c", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1078

CDIV(0, "hclk_vop1_pre_c", "aclk_vop1_pre", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1104

CDIV(0, "hclk_isp0_c", "aclk_isp0", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1110

CDIV(0, "hclk_isp1_c", "aclk_isp1", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1130

CDIV(0, "clk_test_24m", "xin24m", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1132

CDIV(PCLK_ALIVE, "pclk_alive", "gpll", 0,

sys/dev/clk/rockchip/rk3399_cru.c

1140

CDIV(0, "clk_test_c", "clk_test_pre", 0,

sys/dev/clk/rockchip/rk3399_cru.c

792

CDIV(0, "aclkm_core_l_c", "armclkl", 0,

sys/dev/clk/rockchip/rk3399_cru.c

797

CDIV(0, "pclk_dbg_core_l_c", "armclkl", 0,

sys/dev/clk/rockchip/rk3399_cru.c

799

CDIV(0, "atclk_core_l_c", "armclkl", 0,

sys/dev/clk/rockchip/rk3399_cru.c

803

CDIV(0, "aclkm_core_b_c", "armclkb", 0,

sys/dev/clk/rockchip/rk3399_cru.c

809

CDIV(0, "pclken_dbg_core_b", "pclk_dbg_core_b", 0,

sys/dev/clk/rockchip/rk3399_cru.c

811

CDIV(0, "pclk_dbg_core_b_c", "armclkb", 0,

sys/dev/clk/rockchip/rk3399_cru.c

813

CDIV(0, "atclk_core_b_c", "armclkb", 0,

sys/dev/clk/rockchip/rk3399_cru.c

833

CDIV(0, "hclk_vcodec_pre_c", "aclk_vcodec_pre", 0,

sys/dev/clk/rockchip/rk3399_cru.c

839

CDIV(0, "hclk_vdu_pre_c", "aclk_vdu_pre", 0,

sys/dev/clk/rockchip/rk3399_cru.c

851

CDIV(0, "hclk_iep_pre_c", "aclk_iep_pre", 0,

sys/dev/clk/rockchip/rk3399_cru.c

857

CDIV(0, "hclk_rga_pre_c", "aclk_rga_pre", 0,

sys/dev/clk/rockchip/rk3399_cru.c

877

CDIV(0, "pclk_perihp_c", "aclk_perihp", 0,

sys/dev/clk/rockchip/rk3399_cru.c

879

CDIV(0, "hclk_perihp_c", "aclk_perihp", 0,

sys/dev/clk/rockchip/rk3399_cru.c

899

CDIV(0, "clk_pciephy_ref100m_c", "npll", 0,

sys/dev/clk/rockchip/rk3399_cru.c

909

CDIV(0, "pclk_gmac_pre_c", "aclk_gmac_pre", 0,

sys/dev/clk/rockchip/rk3399_cru.c

931

CDIV(0, "pclk_perilp0_c", "aclk_perilp0", 0,

sys/dev/clk/rockchip/rk3399_cru.c

933

CDIV(0, "hclk_perilp0_c", "aclk_perilp0", 0,

sys/dev/clk/rockchip/rk3399_cru.c

945

CDIV(0, "pclk_perilp1_c", "hclk_perilp1", 0,

sys/dev/clk/rockchip/rk3399_cru.c

951

CDIV(0, "clk_saradc_c", "xin24m", 0,

sys/dev/clk/rockchip/rk3399_cru.c

999

CDIV(0, "clk_uart0_div_c", "clk_uart0_src", 0,

sys/dev/clk/rockchip/rk3399_pmucru.c

786

CDIV(PCLK_PMU_SRC, "pclk_pmu_src", "ppll", 0, 0, 0, 5),

sys/dev/clk/rockchip/rk3399_pmucru.c

799

CDIV(0, "clk_i2c0_div", "ppll", 0, 2, 0, 7),

sys/dev/clk/rockchip/rk3399_pmucru.c

801

CDIV(0, "clk_i2c8_div", "ppll", 0, 2, 8, 7),

sys/dev/clk/rockchip/rk3399_pmucru.c

805

CDIV(0, "clk_i2c4_div", "ppll", 0, 3, 0, 7),

sys/dev/clk/rockchip/rk3568_cru.c

329

CDIV(0, "atclk_core_div", "armclk", 0, 3, 0, 5),

sys/dev/clk/rockchip/rk3568_cru.c

331

CDIV(0, "gicclk_core_div", "armclk", 0, 3, 8, 5),

sys/dev/clk/rockchip/rk3568_cru.c

335

CDIV(0, "pclk_core_pre_div", "armclk", 0, 4, 0, 5),

sys/dev/clk/rockchip/rk3568_cru.c

337

CDIV(0, "periphclk_core_pre_div", "armclk", 0, 4, 8, 5),

sys/dev/clk/rockchip/rk3568_cru.c

349

CDIV(0, "aclk_gpu_pre_div", "clk_gpu_pre_c", 0, 6, 8, 2),

sys/dev/clk/rockchip/rk3568_cru.c

352

CDIV(0, "pclk_gpu_pre_div", "clk_gpu_pre_c", 0, 6, 12, 4),

sys/dev/clk/rockchip/rk3568_cru.c

363

CDIV(0, "hclk_npu_pre_div", "clk_npu", 0, 8, 0, 4),

sys/dev/clk/rockchip/rk3568_cru.c

364

CDIV(0, "pclk_npu_pre_div", "clk_npu", 0, 8, 4, 4),

sys/dev/clk/rockchip/rk3568_cru.c

375

CDIV(0, "clk_msch_div", "clk_ddr1x", 0, 10, 0, 2),

sys/dev/clk/rockchip/rk3568_cru.c

489

CDIV(0, "pclk_pipe_div", "aclk_pipe", 0, 29, 4, 4),

sys/dev/clk/rockchip/rk3568_cru.c

499

CDIV(0, "pclk_php_div", "aclk_php", 0, 30, 4, 4),

sys/dev/clk/rockchip/rk3568_cru.c

525

CDIV(0, "pclk_usb_div", "aclk_usb", 0, 32, 4, 4),

sys/dev/clk/rockchip/rk3568_cru.c

550

CDIV(0, "hclk_vi_div", "aclk_vi", 0, 34, 4, 4),

sys/dev/clk/rockchip/rk3568_cru.c

551

CDIV(0, "pclk_vi_div", "aclk_vi", 0, 34, 8, 4),

sys/dev/clk/rockchip/rk3568_cru.c

567

CDIV(0, "hclk_vo_div", "aclk_vo", 0, 37, 8, 4),

sys/dev/clk/rockchip/rk3568_cru.c

568

CDIV(0, "pclk_vo_div", "aclk_vo", 0, 37, 12, 4),

sys/dev/clk/rockchip/rk3568_cru.c

591

CDIV(0, "hclk_vpu_pre_div", "aclk_vpu_pre", 0, 42, 8, 4),

sys/dev/clk/rockchip/rk3568_cru.c

599

CDIV(0, "hclk_rga_pre_div", "aclk_rga_pre", 0, 43, 8, 4),

sys/dev/clk/rockchip/rk3568_cru.c

600

CDIV(0, "pclk_rga_pre_div", "aclk_rga_pre", 0, 43, 12, 4),

sys/dev/clk/rockchip/rk3568_cru.c

605

CDIV(0, "hclk_rkvenc_pre_div", "aclk_rkvenc_pre", 0, 44, 8, 4),

sys/dev/clk/rockchip/rk3568_cru.c

617

CDIV(0, "hclk_rkvdec_pre_div", "aclk_rkvdec_pre", 0, 47, 8, 4),

sys/dev/clk/rockchip/rk3568_cru.c

640

CDIV(0, "clk_tsadc_div", "clk_tsadc_tsen", 0, 51, 8, 7),

sys/dev/clk/rockchip/rk3568_cru.c

763

CDIV(0, "clk_gpll_div_400m_div", "gpll", 0, 75, 0, 5),

sys/dev/clk/rockchip/rk3568_cru.c

764

CDIV(0, "clk_gpll_div_300m_div", "gpll", 0, 75, 8, 5),

sys/dev/clk/rockchip/rk3568_cru.c

767

CDIV(0, "clk_gpll_div_200m_div", "gpll", 0, 76, 0, 5),

sys/dev/clk/rockchip/rk3568_cru.c

768

CDIV(0, "clk_gpll_div_150m_div", "gpll", 0, 76, 8, 5),

sys/dev/clk/rockchip/rk3568_cru.c

771

CDIV(0, "clk_gpll_div_100m_div", "gpll", 0, 77, 0, 5),

sys/dev/clk/rockchip/rk3568_cru.c

772

CDIV(0, "clk_gpll_div_75m_div", "gpll", 0, 77, 8, 5),

sys/dev/clk/rockchip/rk3568_cru.c

775

CDIV(0, "clk_gpll_div_20m_div", "gpll", 0, 78, 0, 6),

sys/dev/clk/rockchip/rk3568_cru.c

776

CDIV(0, "clk_cpll_div_500m_div", "cpll", 0, 78, 8, 5),

sys/dev/clk/rockchip/rk3568_cru.c

779

CDIV(0, "clk_cpll_div_333m_div", "cpll", 0, 79, 0, 6),

sys/dev/clk/rockchip/rk3568_cru.c

780

CDIV(0, "clk_cpll_div_250m_div", "cpll", 0, 79, 8, 5),

sys/dev/clk/rockchip/rk3568_cru.c

783

CDIV(0, "clk_cpll_div_125m_div", "cpll", 0, 80, 0, 6),

sys/dev/clk/rockchip/rk3568_cru.c

784

CDIV(0, "clk_cpll_div_62P5m_div", "cpll", 0, 80, 8, 5),

sys/dev/clk/rockchip/rk3568_cru.c

787

CDIV(0, "clk_cpll_div_50m_div", "cpll", 0, 81, 0, 6),

sys/dev/clk/rockchip/rk3568_cru.c

788

CDIV(0, "clk_cpll_div_25m_div", "cpll", 0, 81, 8, 5),

sys/dev/clk/rockchip/rk3568_cru.c

791

CDIV(0, "clk_cpll_div_100m_div", "cpll", 0, 82, 0, 6),

sys/dev/clk/rockchip/rk3568_cru.c

792

CDIV(0, "clk_osc0_div_750k_div", "xin24m", 0, 82, 8, 5),

sys/dev/clk/rockchip/rk3568_cru.c

795

CDIV(0, "clk_i2s3_2ch_rx_src_div", "clk_i2s3_2ch_rx_src_sel", 0, 83, 0, 7),

sys/dev/clk/rockchip/rk3568_pmucru.c

110

CDIV(0, "xin_osc0_div_div", "xin24m", 0, 0, 0, 5),

sys/dev/clk/rockchip/rk3568_pmucru.c

117

CDIV(0, "pclk_pdpmu_pre", "clk_pdpmu", 0, 2, 0, 5),

sys/dev/clk/rockchip/rk3568_pmucru.c

121

CDIV(0, "clk_i2c0_div", "clk_pdpmu", 0, 3, 0, 7),

sys/dev/clk/rockchip/rk3568_pmucru.c

124

CDIV(0, "sclk_uart0_div_div", "sclk_uart0_div_sel", 0, 4, 0, 7),

sys/dev/clk/rockchip/rk3568_pmucru.c

132

CDIV(0, "clk_pwm0_div", "clk_pwm0_sel", 0, 6, 0, 7),

sys/dev/clk/rockchip/rk3568_pmucru.c

137

CDIV(0, "clk_ref24m_div", "clk_pdpmu", 0, 7, 0, 6),

sys/dev/clk/rockchip/rk3568_pmucru.c

145

CDIV(0, "clk_wifi_div_div", "clk_pdpmu", 0, 8, 8, 6),

sys/dev/clk/rockchip/rk3568_pmucru.c

149

CDIV(0, "clk_pciephy0_div_div", "ppll_ph0", 0, 9, 0, 3),

sys/dev/clk/rockchip/rk3568_pmucru.c

152

CDIV(0, "clk_pciephy1_div_div", "ppll_ph0", 0, 9, 4, 3),

sys/dev/clk/rockchip/rk3568_pmucru.c

155

CDIV(0, "clk_pciephy2_div_div", "ppll_ph0", 0, 9, 8, 3),