sys/dev/etherswitch/ar40xx/ar40xx_hw_mdio.h

36

extern int ar40xx_hw_phy_mmd_read(struct ar40xx_softc *sc, uint32_t phy_id,

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

163

tx_ok = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802e);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

164

tx_ok_high16 = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802d);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

165

tx_error = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802f);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

166

rx_ok = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802b);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

167

rx_ok_high16 = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802a);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

168

rx_error = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802c);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

231

tx_ok = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802e);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

232

tx_ok_high16 = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802d);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

233

tx_error = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802f);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

234

rx_ok = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802b);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

235

rx_ok_high16 = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802a);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

236

rx_error = ar40xx_hw_phy_mmd_read(sc, phy, 7, 0x802c);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

277

status = ar40xx_hw_phy_mmd_read(sc, 5, 1, 0x28);