crypto/heimdal/kadmin/rpc.c

46

int __r; \

crypto/heimdal/kadmin/rpc.c

47

if ((__r = (x))) { \

crypto/heimdal/kadmin/rpc.c

49

__r, __FILE__, __LINE__); \

lib/msun/aarch64/fenv.h

127

fexcept_t __r;

lib/msun/aarch64/fenv.h

129

__mrs_fpsr(__r);

lib/msun/aarch64/fenv.h

130

__r &= ~__excepts;

lib/msun/aarch64/fenv.h

131

__msr_fpsr(__r);

lib/msun/aarch64/fenv.h

138

fexcept_t __r;

lib/msun/aarch64/fenv.h

140

__mrs_fpsr(__r);

lib/msun/aarch64/fenv.h

141

*__flagp = __r & __excepts;

lib/msun/aarch64/fenv.h

148

fexcept_t __r;

lib/msun/aarch64/fenv.h

150

__mrs_fpsr(__r);

lib/msun/aarch64/fenv.h

151

__r &= ~__excepts;

lib/msun/aarch64/fenv.h

152

__r |= *__flagp & __excepts;

lib/msun/aarch64/fenv.h

153

__msr_fpsr(__r);

lib/msun/aarch64/fenv.h

160

fexcept_t __r;

lib/msun/aarch64/fenv.h

162

__mrs_fpsr(__r);

lib/msun/aarch64/fenv.h

163

__r |= __excepts;

lib/msun/aarch64/fenv.h

164

__msr_fpsr(__r);

lib/msun/aarch64/fenv.h

171

fexcept_t __r;

lib/msun/aarch64/fenv.h

173

__mrs_fpsr(__r);

lib/msun/aarch64/fenv.h

174

return (__r & __excepts);

lib/msun/aarch64/fenv.h

180

fenv_t __r;

lib/msun/aarch64/fenv.h

182

__mrs_fpcr(__r);

lib/msun/aarch64/fenv.h

183

return ((__r >> _ROUND_SHIFT) & _ROUND_MASK);

lib/msun/aarch64/fenv.h

189

fenv_t __r;

lib/msun/aarch64/fenv.h

193

__mrs_fpcr(__r);

lib/msun/aarch64/fenv.h

194

__r &= ~(_ROUND_MASK << _ROUND_SHIFT);

lib/msun/aarch64/fenv.h

195

__r |= __round << _ROUND_SHIFT;

lib/msun/aarch64/fenv.h

196

__msr_fpcr(__r);

lib/msun/aarch64/fenv.h

216

fenv_t __r;

lib/msun/aarch64/fenv.h

218

__mrs_fpcr(__r);

lib/msun/aarch64/fenv.h

219

*__envp = __r << 32;

lib/msun/aarch64/fenv.h

220

__r &= ~(_ENABLE_MASK);

lib/msun/aarch64/fenv.h

221

__msr_fpcr(__r);

lib/msun/aarch64/fenv.h

223

__mrs_fpsr(__r);

lib/msun/aarch64/fenv.h

224

*__envp |= (__uint32_t)__r;

lib/msun/aarch64/fenv.h

225

__r &= ~(_ENABLE_MASK);

lib/msun/aarch64/fenv.h

226

__msr_fpsr(__r);

lib/msun/aarch64/fenv.h

242

fexcept_t __r;

lib/msun/aarch64/fenv.h

244

__mrs_fpsr(__r);

lib/msun/aarch64/fenv.h

246

feraiseexcept(__r & FE_ALL_EXCEPT);

lib/msun/aarch64/fenv.h

277

fenv_t __r;

lib/msun/aarch64/fenv.h

279

__mrs_fpcr(__r);

lib/msun/aarch64/fenv.h

280

return ((__r & _ENABLE_MASK) >> _FPUSW_SHIFT);

lib/msun/aarch64/fenv.h

78

#define __mrs_fpcr(__r) __asm __volatile("mrs %0, fpcr" : "=r" (__r))

lib/msun/aarch64/fenv.h

79

#define __msr_fpcr(__r) __asm __volatile("msr fpcr, %0" : : "r" (__r))

lib/msun/aarch64/fenv.h

81

#define __mrs_fpsr(__r) __asm __volatile("mrs %0, fpsr" : "=r" (__r))

lib/msun/aarch64/fenv.h

82

#define __msr_fpsr(__r) __asm __volatile("msr fpsr, %0" : : "r" (__r))

lib/msun/arm/fenv.h

109

#define vmrs_fpscr(__r) __asm __volatile("vmrs %0, fpscr" : "=&r"(__r))

lib/msun/arm/fenv.h

110

#define vmsr_fpscr(__r) __asm __volatile("vmsr fpscr, %0" : : "r"(__r))

lib/msun/ld128/s_asinpil.c

114

y = __r(ax * ax);

lib/msun/ld128/s_asinpil.c

121

x = __r(y / 2);

lib/msun/ld128/s_asinpil.c

154

y = __r(x * x);

lib/msun/ld128/s_asinpil.c

161

ax = __r(y / 2);

lib/msun/ld128/s_atanpil.c

121

y = __r(ax * ax);

lib/msun/ld128/s_atanpil.c

129

y = __r(x * x);

lib/msun/ld128/s_atanpil.c

135

y = __r(x * x);

lib/msun/ld128/s_atanpil.c

144

y = __r(x * x);

lib/msun/ld128/s_atanpil.c

150

y = __r(x * x);

lib/msun/ld80/s_asinpil.c

129

y = __r(ax * ax);

lib/msun/ld80/s_asinpil.c

136

x = __r(y / 2);

lib/msun/ld80/s_asinpil.c

171

y = __r(x * x);

lib/msun/ld80/s_asinpil.c

179

ax = __r(y / 2);

lib/msun/ld80/s_atanpil.c

138

y = __r(ax * ax);

lib/msun/ld80/s_atanpil.c

147

y = __r(x * x);

lib/msun/ld80/s_atanpil.c

153

y = __r(x * x);

lib/msun/ld80/s_atanpil.c

162

y = __r(x * x);

lib/msun/ld80/s_atanpil.c

168

y = __r(x * x);

lib/msun/powerpc/fenv.h

151

union __fpscr __r;

lib/msun/powerpc/fenv.h

155

__mffs(&__r);

lib/msun/powerpc/fenv.h

156

__r.__bits.__reg &= ~__excepts;

lib/msun/powerpc/fenv.h

157

__mtfsf(__r);

lib/msun/powerpc/fenv.h

164

union __fpscr __r;

lib/msun/powerpc/fenv.h

166

__mffs(&__r);

lib/msun/powerpc/fenv.h

167

*__flagp = __r.__bits.__reg & __excepts;

lib/msun/powerpc/fenv.h

174

union __fpscr __r;

lib/msun/powerpc/fenv.h

178

__mffs(&__r);

lib/msun/powerpc/fenv.h

179

__r.__bits.__reg &= ~__excepts;

lib/msun/powerpc/fenv.h

180

__r.__bits.__reg |= *__flagp & __excepts;

lib/msun/powerpc/fenv.h

181

__mtfsf(__r);

lib/msun/powerpc/fenv.h

188

union __fpscr __r;

lib/msun/powerpc/fenv.h

192

__mffs(&__r);

lib/msun/powerpc/fenv.h

193

__r.__bits.__reg |= __excepts;

lib/msun/powerpc/fenv.h

194

__mtfsf(__r);

lib/msun/powerpc/fenv.h

201

union __fpscr __r;

lib/msun/powerpc/fenv.h

203

__mffs(&__r);

lib/msun/powerpc/fenv.h

204

return (__r.__bits.__reg & __excepts);

lib/msun/powerpc/fenv.h

210

union __fpscr __r;

lib/msun/powerpc/fenv.h

212

__mffs(&__r);

lib/msun/powerpc/fenv.h

213

return (__r.__bits.__reg & _ROUND_MASK);

lib/msun/powerpc/fenv.h

219

union __fpscr __r;

lib/msun/powerpc/fenv.h

223

__mffs(&__r);

lib/msun/powerpc/fenv.h

224

__r.__bits.__reg &= ~_ROUND_MASK;

lib/msun/powerpc/fenv.h

225

__r.__bits.__reg |= __round;

lib/msun/powerpc/fenv.h

226

__mtfsf(__r);

lib/msun/powerpc/fenv.h

233

union __fpscr __r;

lib/msun/powerpc/fenv.h

235

__mffs(&__r);

lib/msun/powerpc/fenv.h

236

*__envp = __r.__bits.__reg;

lib/msun/powerpc/fenv.h

243

union __fpscr __r;

lib/msun/powerpc/fenv.h

245

__mffs(&__r);

lib/msun/powerpc/fenv.h

246

*__envp = __r.__bits.__reg;

lib/msun/powerpc/fenv.h

247

__r.__bits.__reg &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);

lib/msun/powerpc/fenv.h

248

__mtfsf(__r);

lib/msun/powerpc/fenv.h

255

union __fpscr __r;

lib/msun/powerpc/fenv.h

257

__r.__bits.__reg = *__envp;

lib/msun/powerpc/fenv.h

258

__mtfsf(__r);

lib/msun/powerpc/fenv.h

265

union __fpscr __r;

lib/msun/powerpc/fenv.h

267

__mffs(&__r);

lib/msun/powerpc/fenv.h

268

__r.__bits.__reg &= FE_ALL_EXCEPT;

lib/msun/powerpc/fenv.h

269

__r.__bits.__reg |= *__envp;

lib/msun/powerpc/fenv.h

270

__mtfsf(__r);

lib/msun/powerpc/fenv.h

287

union __fpscr __r;

lib/msun/powerpc/fenv.h

290

__mffs(&__r);

lib/msun/powerpc/fenv.h

291

__oldmask = __r.__bits.__reg;

lib/msun/powerpc/fenv.h

292

__r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT;

lib/msun/powerpc/fenv.h

293

__mtfsf(__r);

lib/msun/powerpc/fenv.h

300

union __fpscr __r;

lib/msun/powerpc/fenv.h

303

__mffs(&__r);

lib/msun/powerpc/fenv.h

304

__oldmask = __r.__bits.__reg;

lib/msun/powerpc/fenv.h

305

__r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT);

lib/msun/powerpc/fenv.h

306

__mtfsf(__r);

lib/msun/powerpc/fenv.h

314

union __fpscr __r;

lib/msun/powerpc/fenv.h

316

__mffs(&__r);

lib/msun/powerpc/fenv.h

317

return ((__r.__bits.__reg & _ENABLE_MASK) << _FPUSW_SHIFT);

lib/msun/src/math_private.h

414

volatile __typeof(a) __ia, __ib, __r, __vw; \

lib/msun/src/math_private.h

427

__r = __ia - __vw; \

lib/msun/src/math_private.h

428

__r += __ib; \

lib/msun/src/math_private.h

429

assert(__vw == (a) && __r == (b)); \

lib/msun/src/s_asinpi.c

146

y = __r(ax * ax);

lib/msun/src/s_asinpi.c

153

x = __r(y / 2);

lib/msun/src/s_asinpi.c

219

y = __r(x * x);

lib/msun/src/s_asinpi.c

227

ax = __r(y / 2);

lib/msun/src/s_asinpif.c

103

x = __r(y / 2);

lib/msun/src/s_asinpif.c

137

y = __r(x * x);

lib/msun/src/s_asinpif.c

145

ax = __r(y / 2);

lib/msun/src/s_asinpif.c

96

y = __r(ax * ax);

lib/msun/src/s_atanpi.c

175

y = __r(ax * ax);

lib/msun/src/s_atanpi.c

183

y = __r(x * x);

lib/msun/src/s_atanpi.c

189

y = __r(x * x);

lib/msun/src/s_atanpi.c

198

y = __r(x * x);

lib/msun/src/s_atanpi.c

204

y = __r(x * x);

lib/msun/src/s_atanpif.c

106

y = __r(ax * ax);

lib/msun/src/s_atanpif.c

114

y = __r(x * x);

lib/msun/src/s_atanpif.c

120

y = __r(x * x);

lib/msun/src/s_atanpif.c

129

y = __r(x * x);

lib/msun/src/s_atanpif.c

135

y = __r(x * x);

sys/compat/linuxkpi/common/include/asm/atomic.h

281

__typeof(*(_po)) __r, __o = *__po; \

sys/compat/linuxkpi/common/include/asm/atomic.h

282

__r = atomic_cmpxchg##type((_p), __o, (_n)); \

sys/compat/linuxkpi/common/include/asm/atomic.h

283

if (unlikely(__r != __o)) \

sys/compat/linuxkpi/common/include/asm/atomic.h

284

*__po = __r; \

sys/compat/linuxkpi/common/include/asm/atomic.h

285

likely(__r == __o); \

sys/kern/sched_shim.c

25

#define __DEFINE_SHIM(__m, __r, __n, __p, __a) \

sys/kern/sched_shim.c

26

DEFINE_IFUNC(, __r, __n, __p) \

sys/kern/sched_shim.c

30

#define DEFINE_SHIM0(__m, __r, __n) \

sys/kern/sched_shim.c

31

__DEFINE_SHIM(__m, __r, __n, (void), ())

sys/kern/sched_shim.c

32

#define DEFINE_SHIM1(__m, __r, __n, __t1, __a1) \

sys/kern/sched_shim.c

33

__DEFINE_SHIM(__m, __r, __n, (__t1 __a1), (__a1))

sys/kern/sched_shim.c

34

#define DEFINE_SHIM2(__m, __r, __n, __t1, __a1, __t2, __a2) \

sys/kern/sched_shim.c

35

__DEFINE_SHIM(__m, __r, __n, (__t1 __a1, __t2 __a2), (__a1, __a2))

sys/sys/systm.h

303

size_t __r, __len, *__outlen; \

sys/sys/systm.h

307

__r = strlcpy((dst), (src), __len); \

sys/sys/systm.h

309

*__outlen = ((__r >= __len) ? __len : __r + 1); \

sys/sys/systm.h

310

((__r >= __len) ? ENAMETOOLONG : 0); \