sys/arm/allwinner/aw_usb3phy.c

150

val |= __SHIFTIN(0x55, PTH_TX_SWING_FULL);

sys/arm/allwinner/aw_usb3phy.c

152

val |= __SHIFTIN(0x20, PTH_TX_DEEMPH_6DB);

sys/arm/allwinner/aw_usb3phy.c

154

val |= __SHIFTIN(0x15, PTH_TX_DEEMPH_3P5DB);

sys/dev/bwi/bwimac.c

308

__SHIFTIN(BWI_CONF_LO_SERVTO, BWI_CONF_LO_SERVTO_MASK) |

sys/dev/bwi/bwimac.c

309

__SHIFTIN(BWI_CONF_LO_REQTO, BWI_CONF_LO_REQTO_MASK));

sys/dev/bwi/bwimac.c

464

state_lo &= ~__SHIFTIN(BWI_STATE_LO_FLAG_PHYRST,

sys/dev/bwi/bwimac.c

530

__SHIFTIN(tpctl->tp_ctrl1, BWI_RFR_TXPWR1_MASK));

sys/dev/bwi/bwiphy.c

230

__SHIFTIN(bbp_atten, mask));

sys/dev/bwi/bwiphy.c

237

__SHIFTIN(bbp_atten, mask));

sys/dev/bwi/bwirf.c

2211

thr = __SHIFTIN((uint32_t)thr1, NRSSI_THR1_MASK) |

sys/dev/bwi/bwirf.c

2212

__SHIFTIN((uint32_t)thr2, NRSSI_THR2_MASK);

sys/dev/bwi/bwirf.c

2229

val = __SHIFTIN(BWI_INVALID_TSSI, BWI_LO_TSSI_MASK) |

sys/dev/bwi/bwirf.c

2230

__SHIFTIN(BWI_INVALID_TSSI, BWI_HI_TSSI_MASK);

sys/dev/bwi/if_bwi.c

2343

val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |

sys/dev/bwi/if_bwi.c

2344

__SHIFTIN(BWI_TXRX32_RINGINFO_FUNC_TXRX,

sys/dev/bwi/if_bwi.c

2348

val = __SHIFTIN(addr_hi, BWI_TXRX32_CTRL_ADDRHI_MASK) |

sys/dev/bwi/if_bwi.c

2364

val = __SHIFTIN(addr_lo, BWI_TXRX32_RINGINFO_ADDR_MASK) |

sys/dev/bwi/if_bwi.c

2365

__SHIFTIN(BWI_TXRX32_RINGINFO_FUNC_TXRX,

sys/dev/bwi/if_bwi.c

2369

val = __SHIFTIN(hdr_size, BWI_RX32_CTRL_HDRSZ_MASK) |

sys/dev/bwi/if_bwi.c

2370

__SHIFTIN(addr_hi, BWI_TXRX32_CTRL_ADDRHI_MASK) |

sys/dev/bwi/if_bwi.c

2854

plcp = __SHIFTIN(ieee80211_rate2plcp(rate, IEEE80211_T_OFDM),

sys/dev/bwi/if_bwi.c

2856

__SHIFTIN(pkt_len, IEEE80211_OFDM_PLCP_LEN_MASK);

sys/dev/bwi/if_bwi.c

3001

hdr->txh_id = __SHIFTIN(BWI_TX_DATA_RING, BWI_TXH_ID_RING_MASK) |

sys/dev/bwi/if_bwi.c

3002

__SHIFTIN(idx, BWI_TXH_ID_IDX_MASK);

sys/dev/bwi/if_bwi.c

3007

phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode,

sys/dev/bwi/if_bwi.c

3183

hdr->txh_id = __SHIFTIN(BWI_TX_DATA_RING, BWI_TXH_ID_RING_MASK) |

sys/dev/bwi/if_bwi.c

3184

__SHIFTIN(idx, BWI_TXH_ID_IDX_MASK);

sys/dev/bwi/if_bwi.c

3189

phy_ctrl = __SHIFTIN(mac->mac_rf.rf_ant_mode,

sys/dev/bwi/if_bwi.c

335

addr = __SHIFTIN(addr_lo, BWI_DESC32_A_ADDR_MASK) |

sys/dev/bwi/if_bwi.c

336

__SHIFTIN(BWI_DESC32_A_FUNC_TXRX, BWI_DESC32_A_FUNC_MASK);

sys/dev/bwi/if_bwi.c

338

ctrl = __SHIFTIN(buf_len, BWI_DESC32_C_BUFLEN_MASK) |

sys/dev/bwi/if_bwi.c

339

__SHIFTIN(addr_hi, BWI_DESC32_C_ADDRHI_MASK);

sys/dev/bwi/if_bwi.c

3591

__SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);

sys/dev/bwi/if_bwi.c

3600

__SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);

sys/dev/bwi/if_bwi.c

3619

__SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);

sys/dev/bwi/if_bwi.c

3639

__SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);

sys/dev/bwi/if_bwi.c

3648

__SHIFTIN(flags, BWI_STATE_LO_FLAGS_MASK);

sys/dev/bwi/if_bwi.c

811

info = __SHIFTIN(sc->sc_pci_revid, BWI_INFO_BBPREV_MASK) |

sys/dev/bwi/if_bwi.c

812

__SHIFTIN(0, BWI_INFO_BBPPKG_MASK);

sys/dev/bwi/if_bwi.c

965

__SHIFTIN(BWI_CONF_LO_SERVTO, BWI_CONF_LO_SERVTO_MASK) |

sys/dev/bwi/if_bwi.c

966

__SHIFTIN(BWI_CONF_LO_REQTO, BWI_CONF_LO_REQTO_MASK));

sys/dev/qat_c2xxx/qat.c

832

dest[nae] = __SHIFTIN(ae, ETR_AP_DEST_AE) |

sys/dev/qat_c2xxx/qat.c

833

__SHIFTIN(mailbox, ETR_AP_DEST_MAILBOX) |

sys/dev/qat_c2xxx/qat_ae.c

1039

reset &= ~(__SHIFTIN(sc->sc_ae_mask, CAP_GLOBAL_CTL_RESET_AE_MASK));

sys/dev/qat_c2xxx/qat_ae.c

1040

reset &= ~(__SHIFTIN(sc->sc_accel_mask, CAP_GLOBAL_CTL_RESET_ACCEL_MASK));

sys/dev/qat_c2xxx/qat_ae.c

1049

} while ((__SHIFTIN(sc->sc_ae_mask, CAP_GLOBAL_CTL_RESET_AE_MASK) |

sys/dev/qat_c2xxx/qat_ae.c

1050

__SHIFTIN(sc->sc_accel_mask, CAP_GLOBAL_CTL_RESET_ACCEL_MASK))

sys/dev/qat_c2xxx/qat_ae.c

1055

clock |= __SHIFTIN(sc->sc_ae_mask, CAP_GLOBAL_CTL_CLK_EN_AE_MASK);

sys/dev/qat_c2xxx/qat_ae.c

1056

clock |= __SHIFTIN(sc->sc_accel_mask, CAP_GLOBAL_CTL_CLK_EN_ACCEL_MASK);

sys/dev/qat_c2xxx/qat_ae.c

2585

FCU_CTRL_CMD_LOAD | __SHIFTIN(ae, FCU_CTRL_AE));

sys/dev/qat_c2xxx/qat_ae.c

722

ctxen |= __SHIFTIN(ctx_mask, CTX_ENABLES_ENABLE);

sys/dev/qat_c2xxx/qat_ae.c

733

ctxen &= ~(__SHIFTIN(ctx_mask & AE_ALL_CTX, CTX_ENABLES_ENABLE));

sys/dev/qat_c2xxx/qat_ae.c

863

val |= __SHIFTIN(cs_reload, AE_MISC_CONTROL_CS_RELOAD) |

sys/dev/qat_c2xxx/qat_ae.c

864

__SHIFTIN(shared_mode, AE_MISC_CONTROL_ONE_CTX_RELOAD);

sys/dev/qat_c2xxx/qat_hw15reg.h

538

#define LA_FLAGS_PROTO_SNOW_3G __SHIFTIN(4, LA_FLAGS_PROTO)

sys/dev/qat_c2xxx/qat_hw15reg.h

539

#define LA_FLAGS_PROTO_GCM __SHIFTIN(2, LA_FLAGS_PROTO)

sys/dev/qat_c2xxx/qat_hw15reg.h

540

#define LA_FLAGS_PROTO_CCM __SHIFTIN(1, LA_FLAGS_PROTO)

sys/dev/qat_c2xxx/qat_hw15reg.h

541

#define LA_FLAGS_PROTO_NO __SHIFTIN(0, LA_FLAGS_PROTO)

sys/dev/qat_c2xxx/qatreg.h

1371

__SHIFTIN(mode, HW_AUTH_CONFIG_MODE) | \

sys/dev/qat_c2xxx/qatreg.h

1372

__SHIFTIN(algo, HW_AUTH_CONFIG_ALGO) | \

sys/dev/qat_c2xxx/qatreg.h

1373

__SHIFTIN(cmp_len, HW_AUTH_CONFIG_CMPLEN)

sys/dev/qat_c2xxx/qatreg.h

1478

__SHIFTIN(mode, CIPHER_CONFIG_MODE) | \

sys/dev/qat_c2xxx/qatreg.h

1479

__SHIFTIN(algo, CIPHER_CONFIG_ALGO) | \

sys/dev/qat_c2xxx/qatreg.h

1480

__SHIFTIN(convert, CIPHER_CONFIG_CONVERT) | \

sys/dev/qat_c2xxx/qatreg.h

1481

__SHIFTIN(dir, CIPHER_CONFIG_DIR)

sys/dev/qat_c2xxx/qatreg.h

213

(__SHIFTIN(ETR_RING_CONFIG_NEAR_WM_0, \

sys/dev/qat_c2xxx/qatreg.h

215

__SHIFTIN(ETR_RING_CONFIG_NEAR_WM_0, \

sys/dev/qat_c2xxx/qatreg.h

217

__SHIFTIN((size), ETR_RING_CONFIG_RING_SIZE))

sys/dev/qat_c2xxx/qatreg.h

221

(__SHIFTIN((wm_nf), ETR_RING_CONFIG_NEAR_FULL_WM) | \

sys/dev/qat_c2xxx/qatreg.h

222

__SHIFTIN((wm_ne), ETR_RING_CONFIG_NEAR_EMPTY_WM) | \

sys/dev/qat_c2xxx/qatreg.h

223

__SHIFTIN((size), ETR_RING_CONFIG_RING_SIZE))

sys/dev/qat_c2xxx/qatvar.h

914

offset = __SHIFTIN(ae & sc->sc_ae_mask, AE_LOCAL_AE_MASK) |

sys/dev/qat_c2xxx/qatvar.h

925

offset = __SHIFTIN(ae & sc->sc_ae_mask, AE_LOCAL_AE_MASK) |

sys/dev/qat_c2xxx/qatvar.h

935

offset = __SHIFTIN(ae & sc->sc_ae_mask, AE_XFER_AE_MASK) |

sys/dev/qat_c2xxx/qatvar.h

936

__SHIFTIN(offset, AE_XFER_CSR_MASK);