CACHE_LINE_SIZE
lck = aligned_alloc(CACHE_LINE_SIZE,
roundup(sizeof(struct pthread_spinlock), CACHE_LINE_SIZE));
char _pad[CACHE_LINE_SIZE - sizeof(struct urwlock) -
static struct rtld_lock lock_place[MAX_RTLD_LOCKS] __aligned(CACHE_LINE_SIZE);
prwlock = aligned_alloc(CACHE_LINE_SIZE,
roundup(sizeof(struct pthread_rwlock), CACHE_LINE_SIZE));
base = xmalloc(CACHE_LINE_SIZE);
if ((uintptr_t)p % CACHE_LINE_SIZE != 0) {
base = xmalloc(2 * CACHE_LINE_SIZE);
if ((r = (uintptr_t)p % CACHE_LINE_SIZE) != 0)
p += CACHE_LINE_SIZE - r;
} __aligned(CACHE_LINE_SIZE);
regs[1] = (func > 0) ? (CACHE_LINE_SIZE - 1) : 0;
static struct bus_space arm_base_bus_space __aligned(CACHE_LINE_SIZE) = {
static struct rwlock __aligned(CACHE_LINE_SIZE) pvh_global_lock;
} __aligned(CACHE_LINE_SIZE);
uintptr_t lock __aligned(CACHE_LINE_SIZE);
#define cache_line_size() CACHE_LINE_SIZE
#define L1_CACHE_BYTES CACHE_LINE_SIZE
#define L1_CACHE_ALIGN(x) ALIGN(x, CACHE_LINE_SIZE)
#define ____cacheline_aligned __aligned(CACHE_LINE_SIZE)
#define ____cacheline_aligned_in_smp __aligned(CACHE_LINE_SIZE)
uint8_t drv_priv[0] __aligned(CACHE_LINE_SIZE);
(_s) - ALIGN(sizeof(struct skb_shared_info), CACHE_LINE_SIZE)
uint8_t cb[64] __aligned(CACHE_LINE_SIZE);
struct skb_shared_info *shinfo __aligned(CACHE_LINE_SIZE);
uint8_t __scratch[0] __aligned(CACHE_LINE_SIZE);
#define NET_SKB_PAD max(CACHE_LINE_SIZE, 32)
#define SKB_DATA_ALIGN(_x) roundup2(_x, CACHE_LINE_SIZE)
uint8_t priv[0] __aligned(CACHE_LINE_SIZE);
uint8_t drv_priv[0] __aligned(CACHE_LINE_SIZE);
uint8_t priv[0] __aligned(CACHE_LINE_SIZE);
uint8_t drv_priv[0] __aligned(CACHE_LINE_SIZE);
uint8_t drv_priv[0] __aligned(CACHE_LINE_SIZE);
uint8_t drv_priv[0] __aligned(CACHE_LINE_SIZE);
struct ieee80211_txq txq __aligned(CACHE_LINE_SIZE);
struct ieee80211_sta sta __aligned(CACHE_LINE_SIZE);
struct ieee80211_vif vif __aligned(CACHE_LINE_SIZE);
struct ieee80211_hw hw __aligned(CACHE_LINE_SIZE);
struct ieee80211_chanctx_conf chanctx_conf __aligned(CACHE_LINE_SIZE);
struct wiphy wiphy __aligned(CACHE_LINE_SIZE);
uint8_t __drdata[0] __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
(CACHE_LINE_SIZE / sizeof(struct cmpl_base))) & \
} __aligned(CACHE_LINE_SIZE);
cpl_handler_t cpl_handler[NUM_CPL_HANDLERS] __aligned(CACHE_LINE_SIZE);
CL_METADATA_SIZE = CACHE_LINE_SIZE,
struct rwlock mw_lock __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
volatile int nm_state __aligned(CACHE_LINE_SIZE); /* NM_OFF, NM_ON, or NM_BUSY */
__be64 *fl_desc __aligned(CACHE_LINE_SIZE);
uint32_t fl_cidx __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE) *irq;
struct mtx stid_lock __aligned(CACHE_LINE_SIZE);
struct mtx atid_lock __aligned(CACHE_LINE_SIZE);
struct mtx ftid_lock __aligned(CACHE_LINE_SIZE);
struct mtx hftid_lock __aligned(CACHE_LINE_SIZE);
struct mtx etid_lock __aligned(CACHE_LINE_SIZE);
volatile uint64_t state __aligned(CACHE_LINE_SIZE);
int size __aligned(CACHE_LINE_SIZE);
void * volatile items[] __aligned(CACHE_LINE_SIZE);
pack = max(sc->params.pci.mps, CACHE_LINE_SIZE);
end = rounddown2(start + MAX_DDP_BUFFER_SIZE, CACHE_LINE_SIZE);
struct rwlock tcb_history_lock __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
#define CACHE_LINE_ALIGN(x) ALIGN_UP((x), CACHE_LINE_SIZE)
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
__aligned(CACHE_LINE_SIZE);
__aligned(CACHE_LINE_SIZE);
__aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
CACHE_LINE_SIZE, &rx->desc_ring_mem);
CACHE_LINE_SIZE, &rx->data_ring_mem);
CACHE_LINE_SIZE, &rx->desc_ring_mem);
CACHE_LINE_SIZE, &rx->dqo.compl_ring_mem);
CACHE_LINE_SIZE, &tx->desc_ring_mem);
align_hdr_pad = roundup2(first_seg_len, CACHE_LINE_SIZE) - first_seg_len;
aligned_head = roundup2(fifo->head, CACHE_LINE_SIZE);
CACHE_LINE_SIZE, &tx->desc_ring_mem);
CACHE_LINE_SIZE, &tx->dqo.compl_ring_mem);
} __aligned(CACHE_LINE_SIZE);
#define HN_RNDIS_PKT_ALIGN CACHE_LINE_SIZE
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
struct vmbus_txbr ch_txbr __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
+ CACHE_LINE_SIZE
+ CACHE_LINE_SIZE;
(((POINTER_UINT)(address)) + (CACHE_LINE_SIZE - 1)) \
& ~(CACHE_LINE_SIZE - 1) \
+ CACHE_LINE_SIZE;
+ CACHE_LINE_SIZE;
#define MLX5E_CACHELINE_SIZE CACHE_LINE_SIZE
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
#ifndef CACHE_LINE_SIZE
#define __cacheline_aligned __attribute__((__aligned__(CACHE_LINE_SIZE)))
#define cache_line_size() CACHE_LINE_SIZE
return (CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
#ifndef CACHE_LINE_SIZE
reserved = sc->rx_buffer_size + CACHE_LINE_SIZE;
CACHE_LINE_SIZE);
struct sfxge_softc *sc __aligned(CACHE_LINE_SIZE);
struct sfxge_rx_sw_desc *queue __aligned(CACHE_LINE_SIZE);
volatile enum sfxge_flush_state flush_state __aligned(CACHE_LINE_SIZE);
int blocked __aligned(CACHE_LINE_SIZE);
struct mtx lock __aligned(CACHE_LINE_SIZE);
unsigned int pending __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
int mtxpool_next __aligned(CACHE_LINE_SIZE);
base = shared_page_alloc(CACHE_LINE_SIZE, CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
#define CACHE_ALIGN CACHE_LINE_SIZE
#define EPOCH_ALIGN CACHE_LINE_SIZE*2
#define EPOCH_ALIGN CACHE_LINE_SIZE
} __aligned(CACHE_LINE_SIZE);
NULL, NULL, NULL, NULL, (CACHE_LINE_SIZE * 2) - 1, 0);
NULL, NULL, NULL, NULL, (CACHE_LINE_SIZE * 2) - 1, UMA_ZONE_PCPU);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
int __aligned(CACHE_LINE_SIZE) bd_numdirtybuffers;
int __aligned(CACHE_LINE_SIZE) bd_running;
long __aligned(CACHE_LINE_SIZE) bd_bufspace;
int __aligned(CACHE_LINE_SIZE) bd_freebuffers;
} __aligned(CACHE_LINE_SIZE);
struct mtx nl_lock __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
#if (CACHE_LINE_SIZE < 128)
__asm volatile("prefetcht0 %0" :: "m" (*(((unsigned long *)x) + CACHE_LINE_SIZE / (sizeof(unsigned long)))));
#define CACHE_PTR_INCREMENT (CACHE_LINE_SIZE / sizeof(void *))
#define CACHE_PTR_NEXT(ptr) ((void *)(roundup2(ptr, CACHE_LINE_SIZE)))
bus_dma_segment_t ift_segs[IFLIB_MAX_TX_SEGS] __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
uint64_t ifl_bus_addrs[IFLIB_MAX_RX_REFRESH] __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
struct if_rxd_frag ifr_frags[IFLIB_MAX_RX_SEGS] __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
int isc_nfl __aligned(CACHE_LINE_SIZE);
volatile uint64_t state __aligned(CACHE_LINE_SIZE);
int size __aligned(CACHE_LINE_SIZE);
void * volatile items[] __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
2 * CACHE_LINE_SIZE)
2 * CACHE_LINE_SIZE)
} __aligned(CACHE_LINE_SIZE);
sz += CACHE_LINE_SIZE;
bd = (struct bsearch4_data *)roundup2((uintptr_t)mem, CACHE_LINE_SIZE);
sz = count * LRADIX4_ITEM_SZ + CACHE_LINE_SIZE;
lr->rt_base = (char *)roundup2((uintptr_t)lr->mem, CACHE_LINE_SIZE);
struct callout co __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
lr->radix_mem = (void *)roundup2((uintptr_t)mem, CACHE_LINE_SIZE);
#define LRADIX6_ITEM_SZ roundup2(sizeof(struct radix6_addr_entry), CACHE_LINE_SIZE)
CACHE_LINE_SIZE), CACHE_LINE_SIZE, M_IPSEC_MISC,
} __aligned(CACHE_LINE_SIZE);
volatile u_int use_count __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
uint32_t br_cons_head __aligned(CACHE_LINE_SIZE);
void *br_ring[0] __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
struct mtx __aligned(CACHE_LINE_SIZE) mnt_mtx; /* mount structure interlock */
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
struct sx so_snd_sx __aligned(CACHE_LINE_SIZE);
struct sx so_rcv_sx __aligned(CACHE_LINE_SIZE);
#define __exclusive_cache_line __aligned(CACHE_LINE_SIZE) \
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
#define VMMETER_ALIGNED __aligned(CACHE_LINE_SIZE)
static struct mtx state_mtx __aligned(CACHE_LINE_SIZE*2);
static struct mtx mutexA __aligned(CACHE_LINE_SIZE*2);
static struct mtx mutexB __aligned(CACHE_LINE_SIZE*2);
#define UMA_SUPER_ALIGN (CACHE_LINE_SIZE * 2)
#define UMA_SUPER_ALIGN CACHE_LINE_SIZE
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
u_int __aligned(CACHE_LINE_SIZE) vmd_free_count; /* (a,f) free page count */
uint8_t vmd_pad[CACHE_LINE_SIZE - (sizeof(u_int) * 2)];
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
} __aligned(CACHE_LINE_SIZE);
static struct vm_freelist __aligned(CACHE_LINE_SIZE)
} __aligned(CACHE_LINE_SIZE);