Symbol: ZY7_SLCR_FPGA_CLK_CTRL
sys/arm/xilinx/zy7_slcr.c
271
reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
sys/arm/xilinx/zy7_slcr.c
274
WR4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit), reg);
sys/arm/xilinx/zy7_slcr.c
297
reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
sys/arm/xilinx/zy7_slcr.c
361
reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
sys/arm/xilinx/zy7_slcr.c
366
WR4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit), reg);
sys/arm/xilinx/zy7_slcr.c
410
reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));