XWRITE4
XWRITE4(sc, runt, XHCI_ERDP_LO(0), (uint32_t)addr);
XWRITE4(sc, runt, XHCI_ERDP_HI(0), (uint32_t)(addr >> 32));
XWRITE4(sc, door, XHCI_DOORBELL(0), 0);
XWRITE4(sc, oper, XHCI_USBSTS, status);
XWRITE4(sc, runt, XHCI_IMAN(0), temp);
XWRITE4(sc, oper, XHCI_CRCR_LO, temp | XHCI_CRCR_LO_CS);
XWRITE4(sc, oper, XHCI_CRCR_HI, 0);
XWRITE4(sc, oper, XHCI_CRCR_LO, temp | XHCI_CRCR_LO_CA);
XWRITE4(sc, oper, XHCI_CRCR_HI, 0);
XWRITE4(sc, door, XHCI_DOORBELL(index),
XWRITE4(sc, oper, XHCI_CRCR_LO, ((uint32_t)addr) | XHCI_CRCR_LO_RCS);
XWRITE4(sc, oper, XHCI_CRCR_HI, (uint32_t)(addr >> 32));
XWRITE4(sc, oper, XHCI_CONFIG, sc->sc_noslot);
XWRITE4(sc, oper, XHCI_USBSTS, temp);
XWRITE4(sc, oper, XHCI_DNCTRL, 0);
XWRITE4(sc, oper, port, v | XHCI_PS_WRC);
XWRITE4(sc, oper, port, v | XHCI_PS_CEC);
XWRITE4(sc, oper, port, v | XHCI_PS_PLC);
XWRITE4(sc, oper, port, v | XHCI_PS_CSC);
XWRITE4(sc, oper, port, v | XHCI_PS_PEC);
XWRITE4(sc, oper, port, v | XHCI_PS_OCC);
XWRITE4(sc, oper, port, v | XHCI_PS_PRC);
XWRITE4(sc, oper, port, v | XHCI_PS_PED);
XWRITE4(sc, oper, port, v & ~XHCI_PS_PP);
XWRITE4(sc, oper, port, v & ~XHCI_PS_PIC_SET(3));
XWRITE4(sc, oper, port, v |
XWRITE4(sc, oper, port, v |
XWRITE4(sc, oper, XHCI_DCBAAP_LO, (uint32_t)addr);
XWRITE4(sc, oper, XHCI_DCBAAP_HI, (uint32_t)(addr >> 32));
XWRITE4(sc, oper, XHCI_DCBAAP_LO, (uint32_t)addr);
XWRITE4(sc, oper, XHCI_DCBAAP_HI, (uint32_t)(addr >> 32));
XWRITE4(sc, oper, port, v);
XWRITE4(sc, oper, port, v);
XWRITE4(sc, oper, port, v | XHCI_PS_WPR);
XWRITE4(sc, runt, XHCI_ERSTSZ(0), XHCI_ERSTS_SET(sc->sc_erst_max));
XWRITE4(sc, oper, port, v |
XWRITE4(sc, oper, port, v |
XWRITE4(sc, oper, port, v | XHCI_PS_PR);
XWRITE4(sc, oper, port, v | XHCI_PS_PP);
XWRITE4(sc, runt, XHCI_IMOD(0), sc->sc_imod_default);
XWRITE4(sc, oper, port, v);
XWRITE4(sc, runt, XHCI_ERDP_LO(0), (uint32_t)addr);
XWRITE4(sc, runt, XHCI_ERDP_HI(0), (uint32_t)(addr >> 32));
XWRITE4(sc, runt, XHCI_ERSTBA_LO(0), (uint32_t)addr);
XWRITE4(sc, runt, XHCI_ERSTBA_HI(0), (uint32_t)(addr >> 32));
XWRITE4(sc, runt, XHCI_IMAN(0), temp);
XWRITE4(sc, oper, XHCI_CRCR_LO, ((uint32_t)addr) | XHCI_CRCR_LO_RCS);
XWRITE4(sc, oper, XHCI_CRCR_HI, (uint32_t)(addr >> 32));
XWRITE4(sc, oper, XHCI_USBCMD, XHCI_CMD_RS |
XWRITE4(sc, door, XHCI_DOORBELL(index),
XWRITE4(sc, oper, XHCI_USBCMD, 0);
XWRITE4(sc, oper, XHCI_USBCMD, 0);
XWRITE4(sc, oper, XHCI_USBCMD, XHCI_CMD_HCRST);