XUSB_PADCTL_UPHY_PLL_S0_CTL2
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2, reg);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2, reg);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2, reg);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2);
WR4(sc, XUSB_PADCTL_UPHY_PLL_S0_CTL2, reg);