XUSB_PADCTL_UPHY_PLL_P0_CTL1
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1, reg);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1, reg);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1, reg);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1, reg);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1, reg);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
reg = RD4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1);
WR4(sc, XUSB_PADCTL_UPHY_PLL_P0_CTL1, reg);