sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

476

reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

479

WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

481

reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

483

WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

485

reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

487

WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

490

reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

519

reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

521

WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

524

reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

526

WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

529

reg = RD4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1);

sys/arm/nvidia/tegra124/tegra124_xusbpadctl.c

532

WR4(sc, XUSB_PADCTL_IOPHY_PLL_S0_CTL1, reg);