XGMAC_DMA_IOWRITE
XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_status);
XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);
XGMAC_DMA_IOWRITE((_channel), _reg, reg_val); \
XGMAC_DMA_IOWRITE(channel, DMA_CH_TDRLR, ring->rdesc_count - 1);
XGMAC_DMA_IOWRITE(channel, DMA_CH_TDLR_HI,
XGMAC_DMA_IOWRITE(channel, DMA_CH_TDLR_LO,
XGMAC_DMA_IOWRITE(channel, DMA_CH_RDRLR, ring->rdesc_count - 1);
XGMAC_DMA_IOWRITE(channel, DMA_CH_RDLR_HI,
XGMAC_DMA_IOWRITE(channel, DMA_CH_RDLR_LO,
XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel->curr_ier);
XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel->curr_ier);
XGMAC_DMA_IOWRITE(channel, DMA_CH_SR,
XGMAC_DMA_IOWRITE(channel, DMA_CH_IER, channel->curr_ier);
XGMAC_DMA_IOWRITE(channel, DMA_CH_TDTR_LO,
XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO,