WRITE1
WRITE1(sc, DMA_CINT, CINT_CAIR);
WRITE1(sc, DMA_CERR, CERR_CAEI);
WRITE1(sc, I2C_IBIC, IBIC_BIIE);
WRITE1(sc, I2C_IBFD, 0x00);
WRITE1(sc, I2C_IBSR, IBSR_IBIF);
WRITE1(sc, I2C_IBSR, IBSR_IBAL);
WRITE1(sc, I2C_IBCR, reg);
WRITE1(sc, I2C_IBDR, slave);
WRITE1(sc, I2C_IBCR, IBCR_MDIS);
WRITE1(sc, I2C_IBCR, IBCR_NOACK);
WRITE1(sc, I2C_IBCR, reg);
WRITE1(sc, I2C_IBSR, IBSR_IBIF);
WRITE1(sc, I2C_IBDR, slave);
WRITE1(sc, I2C_IBCR, IBCR_NOACK | IBCR_IBIE);
WRITE1(sc, I2C_IBCR, IBCR_MDIS);
WRITE1(sc, I2C_IBFD, div_reg);
WRITE1(sc, I2C_IBCR, 0x0); /* Enable i2c */
WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_MSSL | IBCR_NOACK);
WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_MSSL);
WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_MSSL | IBCR_NOACK);
WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_NOACK);
WRITE1(sc, I2C_IBDR, *buf++);