BUS_SPACE_WRT4_MVFREY2
BUS_SPACE_WRT4_MVFREY2(inbound_write_ptr, hba->u.mvfrey.inlist_wptr);
BUS_SPACE_WRT4_MVFREY2(inbound_base,
BUS_SPACE_WRT4_MVFREY2(inbound_base_high,
BUS_SPACE_WRT4_MVFREY2(outbound_base,
BUS_SPACE_WRT4_MVFREY2(outbound_base_high,
BUS_SPACE_WRT4_MVFREY2(outbound_shadow_base,
BUS_SPACE_WRT4_MVFREY2(outbound_shadow_base_high,
BUS_SPACE_WRT4_MVFREY2(f0_doorbell_enable, CPU_TO_F0_DRBL_MSG_A_BIT);
BUS_SPACE_WRT4_MVFREY2(isr_enable, 0x1);
BUS_SPACE_WRT4_MVFREY2(pcie_f0_int_enable, 0x1010);
BUS_SPACE_WRT4_MVFREY2(f0_doorbell_enable, 0);
BUS_SPACE_WRT4_MVFREY2(isr_enable, 0);
BUS_SPACE_WRT4_MVFREY2(pcie_f0_int_enable, 0);
BUS_SPACE_WRT4_MVFREY2(inbound_write_ptr, hba->u.mvfrey.inlist_wptr);
BUS_SPACE_WRT4_MVFREY2(f0_to_cpu_msg_a, msg);
BUS_SPACE_WRT4_MVFREY2(pcie_f0_int_enable, 0);
BUS_SPACE_WRT4_MVFREY2(f0_doorbell, status);
BUS_SPACE_WRT4_MVFREY2(isr_cause, status);
BUS_SPACE_WRT4_MVFREY2(pcie_f0_int_enable, 0x1010);
BUS_SPACE_WRT4_MVFREY2(inbound_write_ptr, hba->u.mvfrey.inlist_wptr);